HLP-A100 Series Operating Manual
HLP-A100 Series
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174
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Field
Description
01
FC address
01
Function
02
The read byte number is 2
00 20
Ouput frequency.Swap high and low, the data is 0x2000, so
the output frequency is 50% of C03.03. Why does 0x2000
correspond to 50%, please see 12.6.
B8 24
CRC check
Field
Description
01
FC address
03
Function
0B D5
Register address(ADDRH ADDRL).The register address of
C03.03 is 303*10-1=3029(0x0BD5)
00 02
The number of read registers is 2
D7 D7
CRC check
Field
Description
01
FC address
03
Function
04
The byte number of received data
00 00 EA 60
0x0000EA60 convert to decimal number is 60000.So the
value of C03.03 is 60000*0.001=60.000
B5 7B
CRC check
Receive data
Transmit data
Receive data
Example:Read the value of C03.03
Transmit:01 03 0B D5 00 02 D7 D7 (Hexadecimal)
Receive: 01 03 04 00 00 EA 60 B5 7B(Hexadecimal)
12.4 Read Holding Registers
Содержание HLP-A100 Series
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