Master
time
One-Step clock synchronization
Two-Step clock synchronization
Slave
time
Sync (t1)
Delay_Req
Delay_Resp (t4)
Delay_Resp (t4)
t-ms
t-sm
t
1
t
4
t
4
t
3
t
3
t
2
Master
time
Slave
time
Sync
Follow_Up (t1)
Delay_Req
t-ms
t-sm
t
1
t
2
Figure 14.2:
One
-
Step versus Two
-
Step clock synchronization
HBM systems are designed to work with End
-
to
-
End Two
-
Step PTP protocol
only. Switches that do not support the End
-
to
-
End Two
-
Step PTP protocol are
not tested or supported by HBM.
GEN3i
I3763-3.1 en HBM: public
323
Содержание GEN3i
Страница 1: ...Portable Data Recorder GEN3i English User Manual I3763 3 1 en HBM public...
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Страница 51: ...33 46 7 70 IEC 61010 1 2010 IEC EN 50110 1 EN 50110 2 50 120 GEN3i I3763 3 1 en HBM public 51...
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