BER Measurements (With clock recovery)
This test inspects whether the SG-PPG-ED (CDR) module is operating properly by
looping the signal from the PPG back to the ED and performing BER measurements.
• Procedure
1.
Insert a 10 dB attenuator in the DATA IN 1 terminal (with built-in CDR) of the
AQ2200-601 10 Gbit/s BERT module’s ED, and use a coaxial cable to connect
this terminal to the DATA OUT terminal of the PPG.
2.
Configure the AQ2200-601 10 Gbit/s BERT module as follows:
PPGIF: Electric
Setup: Couple
Data offset:
0.00 V
Pattern:
PRBS
Data cross point: 50%
PRBS length: PRBS31
Clock source:
Internal
Error mode: Single
Bitrate:
11.32 Gbit/s
Logic:
Positive
Bitrate offset:
0ppm
Meas mode: Single
Clock offset:
0.00V
Meas day:
0 day
Input select:
DataIn 1(CDR)
Meas time:
5 min
Data threshold: 0mV
Disp mode:
Current
Auto sync:
ON
3.
Set the instrument’s data amplitude to 0.5 V, and perform the BER measurement.
Check that no errors occur for five minutes.
4.
In the same way, set the data amplitude to 2.0 V, and perform the BER
measurement. Check that no errors occur for five minutes.
• Connection Diagram
DATA
IN 1 (CDR)
SF 104/2 × 11 PC 3.5-42 700 mm
Coaxial cable
ATT 10 dB
41 KC-10
DATA IN 1 (CDR)
DATA OUT
ATT
4.1 Troubleshooting
4-3
IM 735101-01EN
Troubleshooting, Maintenance, and Inspection
1
2
3
4
5
Index
