Addressing Modes
3-21
TMS320C62x/C67x Fixed-Point Instruction Set
3.8
Addressing Modes
The addressing modes on the ’C62x and ’C67x are linear, circular using BK0,
and circular using BK1. The mode is specified by the addressing mode regis-
ter, or AMR (defined in Chapter 2).
All registers can perform linear addressing. Only eight registers can perform
circular addressing: A4–A7 are used by the .D1 unit and B4–B7 are used by
the .D2 unit. No other units can perform circular addressing.
LDB(U)/LDH(U)/LDW,
STB/STH/STW,
ADDAB/ADDAH/ADDAW/ADDAD,
and SUBAB/SUBAH/SUBAW instructions all use the AMR to determine what
type of address calculations are performed for these registers.
3.8.1
Linear Addressing Mode
3.8.1.1
LD/ST Instructions
For load and store instructions, linear mode simply shifts the
offsetR/cst oper-
and to the left by 2, 1, or 0 for word, halfword, or byte access, respectively, and
then performs an add or a subtract to
baseR (depending on the operation spe-
cified).
3.8.1.2
ADDA/SUBA Instructions
For integer addition and subtraction instructions, linear mode simply shifts the
src1/cst operand to the left by 2, 1, or 0 for word, halfword, or byte data sizes,
respectively, and then performs the add or subtract specified.
3.8.2
Circular Addressing Mode
The BK0 and BK1 fields in the AMR specify block sizes for circular addressing.
See section 2.6.1, on page 2-9, for more information on the AMR.
3.8.2.1
LD/ST Instructions
After shifting
offsetR/cst to the left by 2, 1, or 0 for LDW, LDH(U), or LDB(U),
respectively, an add or subtract is performed with the carry/borrow inhibited
between bits N and N + 1. Bits N + 1 to 31 of
baseR remain unchanged. All
other carries/borrows propagate as usual. If you specify an
offsetR/cst greater
than the circular buffer size, 2
(N + 1)
, the effective
offsetR/cst is modulo the cir-
cular buffer size (see Example 3–4). The circular buffer size in the AMR is not
scaled; for example, a block size of 4 is 4 bytes, not 4
data size (byte, half-
word, word). So, to perform circular addressing on an array of 8 words, a size
of 32 should be specified, or N = 4. Example 3–4 shows a LDW performed with
register A4 in circular mode and BK0 = 4, so the buffer size is 32 bytes, 16 half-
words, or 8 words. The value put in the AMR for this example is 0004 0001h.
