Addressing Modes
3-22
Example 3–4. LDW in Circular Mode
LDW
.D1
*++A4[9],A1
Before LDW
1 cycle after LDW
5 cycles after LDW
A4
0000 0100h
A4
0000 0104h
A4
0000 0104h
A1
XXXX XXXXh
A1
XXXX XXXXh
A1
1234 5678h
mem
104h
1234 5678h
mem
104h
1234 5678h
mem
104h
1234 5678h
Note:
9h words is 24h bytes. 24h bytes is 4 bytes beyond the 32-byte (20h) boundary 100h–11Fh; thus, it is wrapped around to
(124h – 20h = 104h).
3.8.2.2
ADDA/SUBA Instructions
After shifting
src1/cst to the left by 2, 1, or 0 for ADDAW, ADDAH, or ADDAB,
respectively, an add or a subtract is performed with the carry/borrow inhibited
between bits N and N + 1. Bits N + 1 to 31 (inclusive) of
src2 remain unchanged.
All other carries/borrows propagate as usual. If you specify
src1 greater than
the circular buffer size, 2
(N + 1)
, the effective
offsetR/cst is modulo the circular
buffer size (see Example 3–5). The circular buffer size in the AMR is not
scaled; for example, a block size of 4 is 4 bytes, not 4
data size (byte, half-
word, word). So, to perform circular addressing on an array of 8 words, a size
of 32 should be specified, or N = 4. Example 3–5 shows an ADDAH performed
with register A4 in circular mode and BK0 = 4, so the buffer size is 32 bytes,
16 halfwords, or 8 words. The value put in the AMR for this example is
0004 0001h.
Example 3–5. ADDAH in Circular Mode
ADDAH
.D1
A4,A1,A4
Before ADDAH
1 cycle after ADDAH
A4
0000 0100h
A4
0000 0106h
A1
0000 0013h
A1
0000 0013h
Note:
13h halfwords is 26h bytes. 26h bytes is 6 bytes beyond the 32-byte (20h) boundary
100h–11Fh; thus, it is wrapped around to (126h – 20h = 106h).