Tektronix Socket 7 TMS109A, Instruction Manual

Page: 72 / 113

Acquiring and Viewing Disassembled Data
2–26
TMS 109A Socket 7 Microprocessor Support
Hi: 77 -- -- --
FLUSH CYCLE
16Ćbit Default Segment Size
32Ćbit Default Segment Size
Undo marks on this cycle
You can use the Mark Opcode function to specify the default segment size mode
(16-bit or 32-bit) for the cycle. The segment size selection changes the cycle the
cursor is on and the remaining cycles to the end of memory or to the next mark.
The default segment size of the cycle is independent of any prefix override bytes
in the particular fetch. For example, if you mark cycle 455 with a default size of
32 bits, but there are address/operand override prefixes in the instruction, the
default size will be 32 bits but the size of the instruction will be 16 bits.
Only one selection can be made at a time. If the you want to mark both the
opcode and default size of a particular cycle, it must be done in two different
steps.
When marking opcodes of out-of-order fetches, and displaying in Software
mode, and an out-of-order fetch does not have a sequence number, you must
switch to hardware mode to mark that sequence. See Out-Of-Order Fetches on
page 2–21 and Software Display Format on page 2–15.
Information on basic operations contains more details on marking cycles.
The disassembler can display exception vectors. You can select to display the
interrupt vectors for Real, Virtual, or Protected modes in the Interrupt Table field.
(Selecting Virtual is equivalent to selecting Protected.)
You can relocate the table by entering the starting address in the Interrupt Table
Address field. The Interrupt Table Address field provides the disassembler with
the offset address; enter an eight-digit hexadecimal value corresponding to the
offset of the base address of the exception table. The Interrupt Table Size field
lets you specify a three-digit hexadecimal size for the table.
You can make these selections in the Disassembly property page (the Disassem-
bly Format Definition overlay).
Table 2–5 lists the Socket 7 exception vectors for the Real Addressing mode.
Table 2–5: Exception vectors for Real Addressing mode
Exception
number Location in IV* table
(in hexadecimal)
Displayed interrupt name
0 0000
DIVIDE ERROR
1 0004
DEBUG EXCEPTIONS
2 0008
NMI INTERRUPT
Displaying Exception
Vectors