Tektronix Socket 7 TMS109A, Instruction Manual

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Getting Started
TMS 109A Socket 7 Microprocessor Support
1–3
Probe Mode Cycles. Probe Mode cycles are not identified.
Directory Table and Descriptor Table Reads and Writes.
These reads and writes are
not disassembled.
Bus Anomalies.
Some combinations of instructions and operating modes of the
microprocessor can cause additional cycles to be fetched. This behavior is
unpredictable, not documented, and can cause the disassembler to operate
incorrectly with fetched cycles. This is most likely to occur during Floating Point
operations.
AMD-K6-2 processor has a out-of-order fetch mechanism. For fetches, AMD
always loads 32 bytes, starting from the most significant octabyte (octet) in the
block. For example these addresses 00, 08, 10, and18 would be fetched in this
order 18, 10, 08, and 00. Regardless of what the critical word is or if the cache is
enabled. For the disassembler to work properly it needs these 32 byte fetch
blocks or the disassembly will be incorrect.
Nonintrusive Acquisition.
The Socket 7 microprocessor support will not intercept,
modify, or present signals back to the system under test.
Functionality Not Supported
Reads/Writes.
The TMS 109A Socket 7 support package does not interpret
directory or descriptor tables for reads/writes. When long jumps and calls are
executed you may need to supply a code-segment size (see page 2–18), and the
first opcode byte using the Mark Opcode function (see page 2–25).