Tektronix Socket 7 TMS109A, Instruction Manual

Page: 58 / 113

Acquiring and Viewing Disassembled Data
2–12
TMS 109A Socket 7 Microprocessor Support
In the Timing-Waveform display format, the display is set up to show the
following waveforms:
CLK D/C# RESET
Address M/IO# HLDA
DataData_Lo NA# BOFF#
ADS# CACHE# AHOLD
D/P# BRDY#
W/R# LOCK#
In Hardware display format, the disassembler displays certain cycle type labels in
parentheses (see Figure 2–9 on page 2–23). Table 2–3 shows these cycle type
labels and gives a definition of the cycle they represent. Reads to interrupt and
exception vectors will be labeled with the vector name.
The disassembler always displays at least one line of information. Because
fetches should have valid data for the Data and Data_Lo groups, most fetches
should use at least two display lines. For example, a fetch cycle can show both an
instruction and a READ EXTENSION, or FLUSH (or both).
Table 2–3: Cycle type definitions
Label Description
( RESET )
A reset cycle
( MEM READ )
A nonlocked memory read cycle that is not an opcode fetch
( LOCKED MEM READ )
A locked memory read cycle that is not an opcode fetch
( MEM WRITE )
Any nonlocked memory write
( LOCKED MEM WRITE )
Any locked memory write
( IO READ )
Read from an I/O port
( IO WRITE )
Write to an I/O port
( INT ACK )
Interrupt acknowledge cycle
( SHUTDOWN )
Shutdown/special bus cycle; BE7:BE0 = 11111110
( CACHE FLUSH )
Cache flush/special bus cycle; BE7:BE0 = 11111101
( HALT )
Halt/special bus cycle; BE7:BE0 = 11111011
( WRITE-BACK )
Write back/special bus cycle; BE7:BE0 = 11110111
( FLUSH ACK )
Flush Ack/special bus cycle; BE7:BE0 = 11101111
( BRANCH TRACE: TARGET )
Branch Trace Message/special bus cycle; BE7:BE0 = 11011111
( BRANCH TRACE: SOURCE )
Branch Trace Message/special bus cycle; BE7:BE0 = 11011111
( STOP GRANT ACK )
Stop Grant cycle; cycle type is HALT/SPECIAL;
BE7:BE0 = 11111011
Timing-Waveform Display
Format
Hardware Display Format