Tektronix Socket 7 TMS109A, Instruction Manual

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Index
Index–2
TMS 109A Socket 7 Microprocessor Support
display, multiple lines for one sample, 2–11
display formats
Control Flow, 2–15
Hardware, 2–12
Software, 2–15
special characters, 2–10
Subroutine, 2–16
dual processor tracing, 2–18
dual processors execution tracing, 2–18
E
electrical specifications, 3–2
environmental specifications, 3–3
exception vectors, 2–26
F
functionality not supported, 1–3
reads/writes, 1–3
fuse
probe adapter, 4–2
replacing, 4–2
H
Hardware display format, 2–12
cycle type definitions, 2–12
out-of-order fetches, 2–21
I
installing hardware. See connections
Interrupt Table Address field, 2–18
Interrupt Table field, 2–18
Interrupt Table Size field, 2–18
ITP. See connections
J
jumpers
Address Synthesis, 1–6
CLK, 1–5
D/P# Signal, 1–5
MFG_TEST, 1–4
Processor Selection, 1–5
Tracking, 1–6
L
logic analyzer
configuration for disassembler, 1–1
software compatibility, 1–1
M
manual
conventions, ix
how to use the set, ix
Mark Cycle function, 2–25
Mark Opcode function, 2–25
marking cycles, definition of, 2–25
MFG_TEST pins, 1–4
microprocessor, specific clocking and how data is
acquired, 2–1
Mictor to CPU connections, 1–22
Misc, channel assignments, 1–19
MMX instruction set, 2–25
Mnemonic display column, 2–14
O
Other Processor field, 2–18
out-of-order fetches
definition, 2–21
Hardware display format, 2–21
scrolling to some instructions, 2–15
Software display format, 2–22
P
power
for the probe adapter, applying, 1–13
SUT, 1–2
power adapter, 1–13
power jack, 1–14
prefix override bytes, 2–26
primary processor tracing, 2–18
probe adapter
circuit description, 4–1
clearance, 1–6
configuring, 1–4
hardware description, 3–1
jumper positions, 1–4
replacing the fuse, 4–2