User's Manual A19069EJ2V0UM
11
CHAPTER 1 PRODUCT SPECIFCATIONS
1.1 Terminology
Table 1-1. Terminology for Absolute Maximum Ratings
Item Symbol
Definition
Power supply voltage
V
DD
Range of voltages which will not damage or reduce reliability when applied to the V
DD
pin.
Input voltage
V
I
Range of voltages which will not damage or reduce reliability when applied to the input
pin.
Output voltage
V
O
Range of voltages which will not damage or reduce reliability when applied to the output
pin.
Input current
I
I
Maximum current which will not cause latchup when applied to the input pin.
Output current
I
O
Maximum DC current which will not cause damage or reduce reliability when flowing to or
from the output pin.
Operating temperature
T
A
Range of ambient temperatures for normal logical operation.
Storage temperature
T
stg
Range of element temperatures which will not damage or reduce reliability in the state
where neither voltage nor current is applied.
Table 1-2. Terminology for Recommended Operating Conditions
Item Symbol
Definition
Power supply voltage
V
DD
Range of voltages for normal logical operation when V
SS
= 0 V.
High-level input voltage
V
IH
For voltage applied to the input of PFESiP/V850EP1, this value indicates the voltage of the
high-level state in which the input buffer operates normally.
●
If voltage greater than the MIN. value is applied, the input voltage is assured to be high
level.
Low-level input voltage
V
IL
For voltage applied to the input of the embedded array, this value indicates the voltage of
the low-level state in which the input buffer operates normally.
●
If a voltage less than the MAX. value is applied, the input voltage is assured to be low
level.
Positive trigger voltage
V
P
Input level that inverts the output level when the input of PFESiP/V850EP1 is changed from
the low-level side to the high-level side.
Negative trigger voltage
V
N
Input level that inverts the output level when the input of PFESiP/V850EP1 is changed from
the high-level side to the low-level side.
Hysteresis voltage
V
H
Difference between the positive- and negative-trigger voltage.
Input rise time
r
ri
Limit value for the rise time from 10% to 90% of the input voltage applied to the input of
PFESiP/V850EP1.
Input fall time
t
fi
Limit value for the fall time from 90% to 10% of the input voltage applied to the input of
PFESiP/V850EP1.
