CHAPTER 1 PRODUCT SPECIFCATIONS
User's Manual A19069EJ2V0UM
15
1.5 Pull-up/Pull-down Resistance
Table 1-7. Pull-up/Pull-down Resistance (V
DD
= 3.3
±
0.3 V, T
A
= 0 to +70
°
C)
Item Library
Expression
MIN.
TYP.
MAX.
Unit
5 k
Ω
1.8 4.0 9.9
k
Ω
Pull-up resistor (3.3 V buffer)
50 k
Ω
14.2 31.9 80.7
k
Ω
Pull-down resistor (3.3 V buffer)
50 k
Ω
20.6
44.9
116.4
k
Ω
1.6 Power Supply Application/Interruption Procedure
The PFESiP/V850EP1 has two power supply pins: a power supply pin for internal units (IV
DD
) and a power supply
pin for external pins (EV
DD
). The I/O status of an alternate-function I/O pin may be undefined outside the range in
which the operation is guaranteed.
(1) When turning on power
Set to no more than 100 ms the time from when the level of the power supply that starts first becomes 0.1V
DD
until the level of the power supply that starts last becomes 0.9V
DD
.
0.1IV
DD
IV
DD
EV
DD
0 V
MAX. 100 ms
0 V
0.9EV
DD
IV
DD
EV
DD
0 V
0 V
0.1EV
DD
MAX. 100 ms
0.9IV
DD
1.5 V
3.3 V
1.5 V
3.3 V
When EV
DD
(3.3 V) is started before IV
DD
(1.5 V), the pin statuses become undefined until IV
DD
(1.5 V) starts.
(2) When turning off power
Please ensure the time interval between "when the falling-edge level of the power supply that terminates first is
0.90
×
V
DD
" and "when the falling-edge level of the power supply that terminates last is 0.10
×
V
DD
" within 100
ms.
0.9IV
DD
IV
DD
EV
DD
0 V
MAX. 100 ms
0 V
0.1EV
DD
IV
DD
EV
DD
0 V
0 V
0.9EV
DD
MAX. 100 ms
0.1IV
DD
1.5 V
3.3 V
1.5 V
3.3 V
