CHAPTER 1 PRODUCT SPECIFCATIONS
User's Manual A19069EJ2V0UM
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(b) Write timing (SDRAM access)
Figure 1-10. Write Timing (SDRAM Access)
T0
TACT
TWR TWR TWR
TWR
< t
DKBC
>
< t
DKCS
>
< t
DKCS
>
< t
DKRAS
>
< t
D KRAS
>
< t
DKCAS
>
< t
DKCAS
>
< t
DKWE
>
< t
DKDQM
>
< t
DKWE
>
< t
DKDQM
>
< t
DKDT1
>
< t
DKDT2
>
< t
DKDT2
>
< t
DKDT2
>
< t
HZKDT
>
BUSCLK (output)
A0-A25 (output)
BCYSTZ (output)
CSZn
Note
(output)
SDRASZ (output)
SDCASZ (output)
SDWEZ (output)
DQM0-DQM3 (output)
D0-D31 (I/O)
SDCKE (output)
< t
DKA
>
< t
DKA
>
< t
DKA
>
< t
DKA
>
< t
DKA
>
< t
DKA
>
< t
DKA
>
< t
DKBC
>
< t
DKBC
>
< t
DKBC
>
< t
DKCKE
>
< t
DKCKE
>
Note
n = 1, 3, 4, 6
Remarks
Broken lines indicate high impedance.
