CHAPTER 1 PRODUCT SPECIFCATIONS
User's Manual A19069EJ2V0UM
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(a) Read timing (SDRAM access)
Figure 1-9. Read Timing (SDRAM Access)
BUSCLK (output)
TW
TACT
TBCW
TREAD
TLATE
TLATE
A0-A25 (output)
BCYSTZ (output)
CSZn
Note
(output)
SDRASZ (output)
SDCASZ (output)
SDWEZ (output)
DQM0-DQM3 (output)
D0-D31 (I/O)
SDCKE (output)
< t
D KA
>
< t
DKBC
>
< t
DKCS
>
< t
DKRAS
> < t
DKRAS
>
< t
DKCAS
>
< t
DKCAS
>
< t
DKWE
>
< t
DKDQM
>
< t
DKDQM
>
< t
HKDRM
>
< t
SKDRM
>
< t
DKCKE
>
< t
DKA
>
< t
DKA
>
< t
DKA
>
< t
DKBC
>
< t
DKBC
>
< t
DKCS
>
< t
DKCKE
>
Note
n = 1, 3, 4, 6
Remarks 1.
Number of waits inserted by BCW1n and BCW0n bits of the SCRn register (TBCW)
2.
Broken lines indicate high impedance.
