CHAPTER 1 PRODUCT SPECIFCATIONS
User's Manual A19069EJ2V0UM
22
(c) Write timing (SRAM, external ROM, external I/O)
Figure 1-5. Write Timing (SRAM, External ROM, External I/O)
BUSCLK (output)
A0-A25, CSZ0-CSZ7
(output)
WRZ0-WRZ3, WRSTBZ
(output)
RDZ, IORDZ (output)
D0-D31 (I/O)
WAITZ (input)
BCYSTZ (output)
TASW
T1 TW T2 TI
< t
DKRDH
>
< t
DKWRH
>
< t
DKWRL
>
< t
DKOD
>
< t
HKW
>
< t
SKW
>
< t
HKW
>
< t
SKW
>
< t
DKBSL
>
< t
DKBSH
>
< t
DKBSL
>
< t
DKA
>
Note
< t
DKA
>
< t
DKWRH
>
< t
DKWRL
>
< t
DKRDL
>
< t
HKOD
>
Note
In the case of CSZ0-CSZ7
Remarks 1.
Timing when the number of waits inserted by the DWC0 or DWC1 register is 0, the number
of idle states inserted by the BCC register is 1, and the number of waits inserted by the ASC
register is 1.
2.
Broken lines indicate high impedance.
