phyCORE
®
-i.MX 6 [PCM-058]
30
©
PHYTEC Messtechnik GmbH 2016 L-808e_2
7
System Memory
The phyCORE-i.MX 6 provides four types of on-board memory:
•
1 Bank DDR3 RAM:
512 GB DDR3 SDRAM (up to 2 GB)
•
NAND Flash (TSOP) :
256 MB (up to 16 GB)
,
alternatively eMMC 2 GB (up to 32 GB)
•
I²C-EEPROM: 4
kB
•
SPI Flash:
16 MB
The following sections of this chapter detail each memory type used on the
phyCORE-i.MX 6.
7.1
DDR3-SDRAM (U4-U7)
The RAM memory of the phyCORE-i.MX 6 is comprised of one 64 bit wide bank with four 16-
bit wide DDR3-SDRAM chips (U4-U7). The chips are connected to the special DDR interface
called Multi Mode DDR Controller (MMDC) of the i.MX 6 microcontroller.
The DDR3 memory is accessible starting at address 0x1000 0000.
Typically the DDR3-SDRAM initialization is performed by a boot loader or operating system
following a power-on reset and must not be changed at a later point by any application
code. When writing custom code independent of an operating system or boot loader, the
SDRAM must be initialized by accessing the appropriate SDRAM configuration registers on
the i.MX 6 controller. Refer to the
i.MX 6 Reference Manual
for accessing and configuring
these registers.
17
:
The maximum memory size listed is as of the printing of this manual. Please contact PHYTEC for more information about additional, or
new module configurations available.
Summary of Contents for phyCORE-i.MX 6
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Page 33: ...Jumpers PHYTEC Messtechnik GmbH 2016 L 808e_2 19 Figure 6 Jumper Locations top view J6 J3 J4...
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Page 82: ...Published by PHYTEC Messtechnik GmbH 2016 Ordering No L 808e_2 Printed in Germany...
