Phytec phyCORE-i.MX 6, Hardware Manual

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LVDS Camera Interface
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PHYTEC Messtechnik GmbH 2016 L-808e_2
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15 Camera Interfaces
The phyCORE-i.MX 6 SOM offers various interfaces to connect digital cameras. Up to two
parallel camera interfaces (IPU1_CSI0 and IPU2_CSI1
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) as well as the interface to the
MIPI/CSI-2 Host Controller are supported and brought out in different ways. All signals
(including control signals and an I
2
C interface) to use the camera interfaces according to
Phytec's phyCAM-S+, or phyCAM-P standard are available at the phyCORE-Connector.
The i.MX 6 (Solo), and i.MX 6 (DualLite) microcontrollers are equipped with one parallel
camera port (IPU1_CSI0) and one image processing units (version 3H) (IPU #1) to process
the signals from the parallel, or the MIPI camera interface (
Figure 10) . The i.MX 6D (dual
core), and i.MX 6Q (quad core) provide an additional parallel camera port (IPU2_CSI1) and
a second image processing unit (IPU #2
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) ( Figure 11 ). The second, independent image
processing unit of the i.MX 6D (dual core), and the i.MX 6Q (quad core) allows to operate
two cameras at the same time.
Figure 10: Camera Connectivity of the i.MX 6 (Solo/DualLite)
Figure 11: Camera Connectivity of the i.MX 6 (Dual Core/Quad Core)
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: only i.MX 6 with Dual-. or Quad core. i.MX 6 with Solo-, or DualLite core provide only one parallel camera interface and
one IPU.