Phytec phyCORE-i.MX 6, Hardware Manual

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phyCORE
®
-i.MX 6 [PCM-058]
36 ©
PHYTEC Messtechnik GmbH 2016 L-808e_2
9.4 Ethernet Interface
Connection of the phyCORE-i.MX 6 to the world wide web or a local area network (LAN) is
possible using the on-board GbE PHY at U2. It is connected to the RGMII interface of the
i.MX 6. The PHY operates with a data transmission speed of 10 Mbit/s, 100 Mbit/s or
1000 Mbit/s.
Alternatively the RMII (ENET) interface which is available on the phyCORE-Connector can
be used to connect an external PHY. In this case, the on-board GbE PHY (U2) must not be
populated (
section 9.4.4 ).
9.4.1 Ethernet PHY (U2)
With an Ethernet PHY mounted at U2 the phyCORE-i.MX 6 has been designed for use in
10Base-T, 100Base-T and 1000Base-T networks. The 10/100/1000Base-T interface with its
LED signals extends to the phyCORE-Connector X1.
Pin # Signal ST Voltage Domain Description
X1C2 X/TX0+ ETH_O VDD_3V3_LOGIC ETH0 data A+/t
X1C3 X_ETH0_A-/TX0- ETH_O VDD_3V3_LOGIC ETH0 data A-/transmit-
X1C5 X ETH_I/O VDD_3V3_LOGIC ETH0 data C+ (only GbE)
X1C6 X_ETH0_C- ETH_I/O VDD_3V3_LOGIC ETH0 data C- (only GbE)
X1C7 X_ETH0_LED0 OC VDD_3V3_LOGIC ETH0 link LED output
X1D2 X/RX0+ ETH_I VDD_3V3_LOGIC ETH0 data B+/
X1D3 X_ETH0_B-/RX0- ETH_I VDD_3V3_LOGIC ETH0 data B-/receive-
X1D4 X_ETH0_LED1 OC VDD_3V3_LOGIC ETH0 traffic LED output
X1D5 X ETH_I/O VDD_3V3_LOGIC ETH0 data D+ (only GbE)
X1D6 X_ETH0_D- ETH_I/O VDD_3V3_LOGIC ETH0 data D- (only GbE)
Table 15: Location of the Ethernet Signals
The on-board GbE PHY supports HP Auto-MDIX technology, eliminating the need for the
consideration of a direct connect LAN cable, or a cross-over patch cable. It detects the TX
and RX pins of the connected device and automatically configures the PHY TX and RX pins
accordingly. The Ethernet PHY also features an Auto-negotiation to automatically
determine the best speed and duplex mode.
The Ethernet PHY is connected to the RGMII interface of the i.MX 6. Please refer to the
i.MX 6 Reference Manual for more information about this interface.