Phytec phyCORE-i.MX 6, Hardware Manual

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System Memory
©
PHYTEC Messtechnik GmbH 2016 L-808e_2
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7.2 NAND Flash Memory (U12)
Use of Flash as non-volatile memory on the phyCORE-i.MX 6 provides an easily
reprogrammable means of code storage.
The NAND Flash memory at U12 is connected to the General Purpose Media Interface
(GPMI). Dependent on the memory size one or more of the chip enable signals NANDF_CS0,
NANDF_CS1, NANDF_CS2 and NANDF_CS3 of the GPMI interface select the NAND Flash.
The Flash devices are programmable with 3.3 V. No dedicated programming voltage is
required.
As of the printing of this manual these NAND Flash devices generally have a life expectancy
of at least 100,000 erase/program cycles and a data retention rate of 10 years.
Any parts that are footprint (TSOP-48-50-C3) and functionally compatible may be used
with the phyCORE-i.MX 6.
7.3 eMMC Flash Memory (U14)
Alternatively to the NAND flash memory at U12, an eMMC can be populated at U14.
The eMMC device is programmable with 3.3 V. No dedicated programming voltage is
required.
The eMMC Flash memory is connected to the SD4 interface of the i.MX 6.
Any parts that are footprint (BGA153) and functionally compatible may be used with the
phyCORE-i.MX 6.
7.4 I²C EEPROM (U11)
The phyCORE-i.MX 6 is populated with a non-volatile 4 kB I
2
C
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EEPROM at U11. This
memory can be used to store configuration data or other general purpose data. This device
is accessed through I
2
C port 3 on the i.MX 6. The control registers for I
2
C port 3 are mapped
between addresses 0x021A 8000 and 0x021A BFFF. Please see the i.MX 6 Reference Manual
for detailed information on the registers.
The three lower address bits are fixed to zero which means that the EEPROM can be
accessed at I
2
C address 0x50.
Write protection to the device is accomplished via jumper J4. Refer to
section 7.4.1 for
further details.
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: See the manufacturer’s data sheet for interfacing and operation.