L-827e.A3 phyCORE-i.MX 6UL/ULL Hardware Manual
© PHYTEC Messtecknik GmbH
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18 Tamper Detection
The phyCORE-i.MX 6UL/ULL supports the tamper detection feature of the i.MX 6UL processor version G3. With the
tamper detection feature, it is possible to recognize when the device encounters unauthorized opening or
tampering. Six of the ten tamper detection inputs are used internally in the phyCORE
‑
i.MX 6UL/ULL. The remaining
four inputs are available on phyCORE
‑
Connector X1. The following table shows their location on the connector.
TABLE 32: Tamper Detection Signal Location
Pin #
Signal
ST
Voltage Domain
Description
74
X_GPIO5_
4
I
VDD_SNVS
Tamper detection pin 4 (GPIO5_4)
85
X_GPIO5_
3
I
VDD_SNVS
Tamper detection pin 3 (GPIO5_3)
86
X_GPIO5_
2
I
VDD_SNVS
Tamper detection pin 2 (GPIO5_2)
87
X_GPIO5_
1
I
VDD_SNVS
Tamper detection pin 1 (GPIO5_1)
88
X_GPIO5_
0
I
VDD_SNVS
Tamper detection pin 0 (GPIO5_0)
When not in use, the tamper detection signal is pulled-down internally. In order to implement tamper protection,
this signal should be connected to a tamper detection contact in the application which is normally closed pulling
the tamper detection signal to the power domain VDD_SNVS on the phyCORE
‑
i.MX 6UL/ULL (i.MX 6UL/ULL:
VDD_SNVS_IN).
For proper operation of the tamper detection, an always-ON power supply (coin cell battery, or memory backup
capacitor) must be connected to the VDD_SNVS power input at pin 94 of the phyCORE
‑
Connector.
If the tamper detection feature is enabled by software then the opening of the tamper contact can, e.g., result in:
switching system power ON with a tamper detection alarm interrupt asserted (for software reaction)
activating security-related hardware (e.g. automatic and immediate erasure of the Zeroizable Master Key
and deny access and erase secure memory contents)
17. For controller variants other than G3 this pin is used as X_UART5_RTS_B (see description of jumper J11).
Warning
The tamper detection inputs are multiplexed with the GPIO5 interface (GPIO5_0 to GPIO5_9). Hence, these
inputs can not be used as GPIO if the phyCORE-i.MX 6UL/ULL is equipped with the i.MX 6UL version G3.