Phytec L-827e.A3 phyCORE-i.MX 6UL/ULL, Hardware Manual, Page: 40 / 69

L-827e.A3 phyCORE-i.MX 6UL/ULL Hardware Manual
© PHYTEC Messtecknik GmbH 40
8.2 Boot Device Selection and Configuration
In normal operation (boot mode 0, or 2), the boot ROM uses the state of BOOT_MODE and eFUSEs to determine the
boot device.
During development, it is advisable to set the boot type to “Internal boot” (BOOT_MODE[1:0]=10 12 to allow
choosing and configuring the boot device by using GPIO pin inputs. The input pins are sampled at boot, and
override the values of the corresponding eFUSEs BOOT_CFGx[7:0] if the BT_FUSE_SEL fuse is not blown.
Boot Configuration Pins at the phyCORE ‑ Connector lists the eFUSEs BOOT_CFGx[7:0] and the corresponding input
pins.
Please refer to the i.MX 6UL/ULL Reference Manual for further information about the eFUSEs and the impact of the
settings at the BCFG pins.
Warning
The boot mode configuration resistors must be placed on the carrier board for development! Later on, if
the eFUSEs are used, the resistors can be unpopulated.
Boot Configuration Pins at the
phyCORE ‑ Connector lists the eFUSEs BOOT_CFGx[7:0] and the corresponding input pins. Use 10 k Ω
pull ‑ up and pull-down resistors on the carrier board to configure eFUSEs BOOT_CFGx[7:0] in accordance
with the module features. Options for the Boot Configuration shows some available options for the boot
configuration.
Please make sure that the signals shown in
Boot Configuration Pins at the phyCORE ‑ Connector are not
driven by any device on the baseboard during reset, to avoid accidental change of the boot configuration.
Because of this, we recommend booting from eFUSE for volume production and using only the internal
boot mode for the development process
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