L-827e.A3 phyCORE-i.MX 6UL/ULL Hardware Manual
© PHYTEC Messtecknik GmbH
59
37
X_LCD_D11
O
VDD_3V3
LCD data 11
38
X_LCD_D12
O
VDD_3V3
LCD data 12
39
X_LCD_D13
O
VDD_3V3
LCD data 13
40
X_LCD_D14
O
VDD_3V3
LCD data 14
41
X_LCD_D15
O
VDD_3V3
LCD data 15
42
X_LCD_D16
O
VDD_3V3
LCD data 16
43
X_LCD_D17
O
VDD_3V3
LCD data 17
44
X_LCD_D18
O
VDD_3V3
LCD data 18
45
X_LCD_D19
O
VDD_3V3
LCD data 19
46
X_LCD_D20
O
VDD_3V3
LCD data 20
47
X_LCD_D21
O
VDD_3V3
LCD data 21
48
X_LCD_D22
O
VDD_3V3
LCD data 22
49
X_LCD_D23
O
VDD_3V3
LCD data 23
16.2 Supplementary Signals
TABLE 30: Supplementary Signals to Support the Display Connectivity
Pin #
Signal
ST
Voltage Domain
Description
77
X_PWM3_OUT
O
VDD_3V3
PWM3 output (e.g. to control the
brightness)
Warning
Please consider that the LCD data signals shown in
Parallel Display Interface Signal Location
are boot
configuration pins that must not be driven by any device on the baseboard during reset, to avoid
accidental change of the boot configuration. Please refer to
System Configuration and Booting
or to the
i.MX 6UL/ULL Reference Manual
for more information about the boot configuration.