L-827e.A3 phyCORE-i.MX 6UL/ULL Hardware Manual
© PHYTEC Messtecknik GmbH
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8 System Configuration and Booting
Although most features of the i.MX 6UL/ULL microcontroller are configured and/or programmed during the
initialization routine, other features, which impact program execution, must be configured prior to initialization via
pin termination.
The system start-up configuration includes:
Boot mode selection
Boot device selection
Boot device configuration
The internal ROM code is the first code executed during the initialization process of the i.MX 6UL/ULL after POR. The
ROM code detects the boot mode by using the boot mode pins (BOOT_MODE[1:0]), while the boot device is selected
and configured by determining the state of the eFUSEs and/or the corresponding GPIO input pins
(BOOT_CFGx[7:0]).
8.1 Boot Mode Selection
The boot mode of the i.MX 6UL/ULL microcontroller is determined by the configuration of two boot mode inputs
BOOT_MODE[1:0] during the reset cycle of the operational system. These inputs are brought out at the
phyCORE
‑
Connector X1 X_BOOT_MODE[1:0] (pins 103 and 104).
The table below shows the possible settings of pins X_BOOT_MODE0 (X1 pin 104) and X_ BOOT_MODE1 (X1 pin 103)
and the resulting boot configuration of the i.MX 6UL/ULL.
TABLE 11: Boot Modes of the phyCORE
‑
i.MX 6UL/ULL
Boot Mode
X_ BOOT_MODE1
X_ BOOT_MODE0
Boot Source
0
0
0
Bootconfig from eFUSEs
1
0
1
Serial Downloader
2
1
0
Internal Boot
3
1
1
reserved
The BOOT_MODE[1:0] lines have 4.7 k
Ω
pull
‑
up and 10 k
Ω
pull-down resistors populated on the module. Hence
leaving the two pins unconnected sets the controller to boot mode 2, internal boot.
For serial boot (boot mode = 1) the ROM code polls the communication interface selected, initiates the download of
the code into the internal RAM, and triggers its execution from there. Please refer to the
i.MX 6UL/ULL Reference
Manual
for more information.
In boot mode 0 and 2, the ROM code finds the bootstrap in permanent memories such as NAND-Flash or SD-Cards
and executes it. The selection of the boot device and the configuration of the interface required are accomplished
with the help of the eFUSEs and/or the corresponding GPIO input pins.
9. Default boot mode when pins X_BOOT_MODE[1:0] are left unconnected.