L-827e.A3 phyCORE-i.MX 6UL/ULL Hardware Manual
© PHYTEC Messtecknik GmbH
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1x I
2
C interface
1x SPI interface
1x I
2
S interface
1x SPDIF interface
1x PWM output
1x CAN interface
1x Parallel LCD interface (up to 24-bit)
1x parallel camera interface (10-bit)
1x SD/MMC card interfaces (4-bit)
1x TAG interface
1x user programmable LED
Several dedicated GPIOs
Tamper detection (only available on processor type –G3)
Available for different temperature grades (
)
1. The maximum memory size listed is as of the printing of this manual.
Please contact PHYTEC for more information about additional, or new module configurations available.
2. The JTAG pins are used for other functions (SAI2 interface and SPDIF) within the included BSP.
The pin muxing must be changed in order to use the JTAG interface.
3. Almost every controller port that connects directly to the phyCORE
‑
Connector
may be used as GPIO by using the i.MX 6UL/ULL's pin muxing options.