Oki MSM66591, User Manual

Page: 254 / 466

14-9
14
MSM66591/ML66592 User's Manual
Chapter 14 Baud Rate Generator Functions
14.5 Configuration of SCI2 Timer (S2TM)
The SCI2 timer (S2TM) consists of an 8-bit SCI2 timer counter, an 8-bit SCI2 timer
register that stores the reload values of the SCI2 timer counter, and a control register
(S2CON) that specifies S2TM operations.
[1] SCI2 Timer Counter (low-order 8 bits of 16-bit register S2TM)
The SCI2 timer counter is an 8-bit counter. When S2TM overflows, an interrupt request
is generated, and the content of the 8-bit SCI2 timer register is loaded to SCI2 timer
counter. The count clock of S2TM is selected by the high-order 3 bits (bits 5–7) of the
8-bit SCI2 timer control register (S2CON).
[2] SCI2 Timer Register (high-order 8 bits of 16-bit register S2TM)
The SCI2 timer register is an 8-bit register. The content of the register is loaded to the
SCI2 timer counter when the counter overflows.
The SCI2 timer counter and SCI2 timer register are accessible only as a 16-bit S2TM
which uses the SCI2 timer counter as its low-order 8 bits and the SCI2 timer register as
its high-order 8 bits.
At reset (when the
RES
signal is input, the BRK instruction is executed, the watchdog
timer is overflown, or an operation code trap is generated), S2TM becomes 0000H, and
the count operation stops.
[3] SCI2 Timer Control Register (S2CON)
S2CON is an 8-bit register. The high-order 4 bits (bits 4–7) select the count clock of
S2TM, and controls the start/stop of the count operation. The low-order 2 bits (bits 2
and 3) perform interrupt related controls. The least significant bit (bit 0) specifies the
mode of S2TM.
At reset (when the
RES
signal is input, the BRK instruction is executed, the watchdog
timer is overflown, or an operation code trap is generated), S2CON becomes 02H, a
CLK is selected as the count clock of S2TM, the auto reload timer mode is selected,
and operation stops.
Figure 14-4 shows the configuration of S2CON.
<Description of Each Bit>
• S2MOD (bit 0)
This bit specifies the operation mode of S2TM. If this bit is "0", S2TM operates in
auto reload timer mode. If "1", S2TM operates in SCI2 baud rate generator mode.
• QSTM2 (bit 2)
This bit becomes "1" if an SCI2 timer counter overflow is generated. Since this bit
does not become "0" automatically after an interrupt process is executed, it is
necessary to set to "0" by the program.
• ESTM2 (bit 3)
This bit enables/disables an interrupt request generation by an SCI2 timer counter
overflow. If this bit is "1", generation is enabled, and if "0", generation is disabled.