Oki MSM66591, User Manual

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24-1
MSM66591/ML66592 User's Manual
Chapter 24 RAM Monitor Function
24
24. RAM Monitor Function
The MSM66591/ML66592 have a RAM monitor function that monitors data written to a
set address in the data memory area during the execution of an instruction.
In the MSM66591 this function monitors data written to an address from 0000H to
19FFH in the data memory area, and in the ML66592 it monitors data written to an
address from 0000H to 21FFH.
The RAM monitor function operates as follows. After data has been written to a set
RAM address, an "address matching" signal is output when the set ROM address and
program counter match. Monitor data is read by a synchronous serial transfer (by the
slave) when this matching output is received.
ROM or RAM addresses to be monitored are set with synchronous serial transfers (by
the slave).
Note that the MSM66Q591/ML66Q592 flash EEPROM version and the MSM66591/
ML66592 mask ROM version have different pins to set the RAM monitor function.
In the MSM66Q591/ML66Q592 flash EEPROM version, the RAM monitor function
cannot be used in the user mode used for reprogramming the flash EEPROM.
24.1 Configuration of RAM Monitor Function
Figure 24-1 shows the configuration of the RAM monitor function.
The RAM monitor function consists of a 21-bit shift register, a ROM address buffer, a
RAM address buffer, a RAM data register, comparators and a control circuit. A total of
four pins are used for data transfer: P11_0/RMRX (set address input), P11_1/RMTX
(RAM data output), P11_2/RMCLK (synchronous clock input for data transfer), P11_3/
RMACK (address match detect output).
In the MSM66Q591/ML66Q592 flash EEPROM version, the RAM monitor function is
enabled when the
EA
pin is set to a "H" level; in the MSM66591/ML66592 mask ROM
version, the RAM monitor function is enabled when the TEST pin is set to a "H" level. In
the initial state (MSM66Q591/ML66Q592: state where
EA
pin is at a "L" level or a "H"
level, MSM66591/ML66592: state where the TEST pin is at a "L" level), the entire
contents of the shift register, ROM address buffer, RAM address buffer and RAM data
register are initialized to 00000H.