NR Electric PCS-9611, Instruction Manual

Page: 81 / 300

3 Operation Theory
PCS-9611 Feeder Relay
3-45
Date: 2014-04-08
3.13 Overvoltage Protection
3.13.1 Overvoltage Protection Theory
This relay provides a two-stage overvoltage protection with definite time delay characteristics. The
two stages have same protection logics. Each stage can be used for tripping or alarming through
the PCS-Explorer and the default is for tripping.
This protection can support all kinds of VT connection: three phase voltage (Ua, Ub, Uc), three
phase-to-phase voltages (Uab, Ubc, Uca), two phase-to-phase voltages (Uab, Ubc), anyone of
three phase voltages or anyone of three phase-to-phase voltages.
Two methods are used to check the overvoltage condition by the setting [59P.Opt_1P/3P]. If
setting [59P.Opt_1P/3P] is set as
“0”, and all of the three voltage values are greater than the
voltage setting, the overvoltage protection will operates after the appointed time delay; and if the
setting [59P.Opt_1P/3P] is set as
“1”, and anyone of the three voltage values is greater than the
voltage setting, the overvoltage protection will operates after the appointed time delay.
The setting [59P.Opt_Up/Upp] is used to decide the voltage input mode. If it is set as
“1”, the input
voltage is phase-to-phase voltage; and if it is set as
“0”, the input voltage is phase voltage. So the
voltage setting must be set in accordance with the setting [59P.Opt_Up/Upp]; i.e. if the setting
[59P.Opt_Up/Upp] is set as
“1”, the voltage setting is set according to phase-to-phase voltage;
and if the setting [59P.Opt_Up/Upp] is set as
“0”, the voltage setting is set according to phase
voltage.
The following figure shows the logic diagram of the stage 1 overvoltage protection.
&
[59P1.En]
[59P.Opt_Up/Upp]
&
Uca > [59P1.U_Set]
Uab > [59P1.U_Set]
Ubc > [59P1.U_Set]
Uca > [59P1.U_Set]
Uab > [59P1.U_Set]
Ubc > [59P1.U_Set]
[59P.Opt_1P/3P]
&
&
&
Uc > [59P1.U_Set]
Ua > [59P1.U_Set]
Ub > [59P1.U_Set]
Uc > [59P1.U_Set]
Ua > [59P1.U_Set]
Ub > [59P1.U_Set]
&
&
[59P1.En1]
[59P1.Blk]
[59P1.Op]
[59P1.St]
t
OV1
0
Figure 3.13-1 Logic diagram of the stage 1 overvoltage protection
Where:
[59P1.U_Set] is the voltage setting of the stage 1 overvoltage protection;
“t
OV1
” is the setting [59P1.t_Op], the time setting of the stage 1 overvoltage protection;