Mitsubishi Electric Q06CCPU-V, User Manual

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13
- 30 13.3 Data Communications Using CPU Shared Memory
13.3.3 Communication using the multiple CPU high speed transmission area and auto refresh
13
COMMUNICATIONS BETWEEN CPU MODULES
Sending side program for CPU No.1
(programmable controller CPU)
Receiving side program for CPU No.2 (C Controller module)
{
:
unsigned short usBuf; /* Data storage destination */
unsigned short pusData[128]; /* Data storage destination */
:
/***********************************************************************/
/* Confirm that 1 is set in the area corresponding to M0 in CPU No.1 auto refresh area. */
/* (CPU No.1 data set completion bit turns ON.) */
/***********************************************************************/
while(1){
sRet = QBF_FromBuf(lPath, 0x3E0, 10000, 1, &usBuf, 1);
if( sRet != 0) return(sRet);
if( (usBuf & 0x1) == 0x1 ) break; /* When 1 is set, processing gets out from the loop. */
taskDelay(2);
}
/****************************************************************/
/* Data are read from the area corresponding to D0 to D9 in the CPU No.1 auto refresh area. */
/****************************************************************/
sRet = QBF_FromBuf(lPath, 0x3E0, 10002, 10, pusData, 128);
if( sRet != 0) return(sRet);
/*****************************************************************/
/* 1 is set in the host CPU's auto refresh area corresponding to M32 of CPU No.1. */
/* (CPU No.2 data processing completion bit turns ON.) */
/*****************************************************************/
usBuf = 1;
sRet = QBF_ToBuf(lPath, 0x3E1, 10000, 1, &usBuf, 1);
if( sRet != 0) return(sRet);
/***********************************************************************/
/* Confirm that 0 is set in the area corresponding to M0 in CPU No.1 auto refresh area. */
/* (CPU No.1 data set completion bit turns OFF.) */
/***********************************************************************/
while(1){
sRet = QBF_FromBuf(lPath, 0x3E0, 10000, 1, &usBuf, 1);
if( sRet != 0) return(sRet);
if( (usBuf & 0x1) == 0x0 ) break; /* When 0 is set, processing gets out from the loop. */
taskDelay(2);
}
/*****************************************************************/
/* 0 is set in the host CPU's auto refresh area corresponding to M32 of CPU No.1. */
/* (CPU No.2 data processing completion bit turns OFF.) */
/*****************************************************************/
usBuf = 0;
sRet = QBF_ToBuf(lPath, 0x3E1, 10000, 1, &usBuf, 1);
if( sRet != 0) return(sRet);
}
Figure 13.21 Interlock program example
Write
command
M100
1)
Set send data in
D0 to D9.
2)
6)
SET M0
RST M0
RST M100
M32 M0
M32 M0
3)
4)
5)
7)
8)