Lapis ML610Q111, User Manual

Page: 211 / 402

ML610Q111/ML610Q112
User’s Manual
Chapter 11 Synchronous Serial Port
FEUL610Q111 11-12
11.4.2 Functioning as the SSIO slave mode
SSIO is selected as the secondary function of PB5, PB4, and PB3 by setting PB5MD1-PB3MD1 bit (PBMOD1 register:
bit5-3) to “0” and setting PB5MD0-PB3MD0 bit (PBMOD0 register: bit5-3) to “1”. It is the same setup as the case of
master mode.
reg. name PBMOD1 register (Address:0F25DH)
bit 7 6 5 4 3 2 1 0
bit name
PB7MD1 PB6MD1 PB5MD1 PB4MD1 PB3MD1 PB2MD1 P4BMD1 PB0MD1
value * * 0 0 0 * * *
reg. name PBMOD0 register (Address:0F25CH)
bit 7 6 5 4 3 2 1 0
bit name
PB7MD0 PB6MD0 PB5MD0 PB4MD0 PB3MD0 PB2MD0 PB1MD0 PB0MD0
value * * 1 1 1 * * *
The state of the PB4 pin is selected as CMOS output mode by setting PB4C1 bit (PBCON1 register:bit4) to “1” , setting
PB4C0 bit (PBCON0 register:bit4) to “1” and setting PB4DIR bit (PBDIR register:bit4) to “0”. Additionally, the PB5 and
PB3 pin is selected as input pin by setting PB5DIR,PB3DIR bit (PBDIR register: bit5,3) to “1”
The setting value of PB5C1,PB3C1 bit and PB5C0,PB3C0 bit ($) is optional. Optional input modes are selected according
to the state of the external circuit where the PB5 and PB3 pin is connected.
reg. name PBCON1 register (Address:0F25BH)
bit 7 6 5 4 3 2 1 0
bit name
PB7C1 PB6C1 PB5C1 PB4C1 PB3C1 PB2C1 PB1C1 PB0C1
value * * $ 1 $ * * *
reg. name PBCON0 register (Address:0F25AH)
bit 7 6 5 4 3 2 1 0
bit name
PB7C0 PB6C0 PB5C0 PB4C0 PB3C0 PB2C0 PB1C0 PB0C0
value * * $ 1 $ * * *
reg. name PBDIR register (Address:0F259H)
bit 7 6 5 4 3 2 1 0
bit name
PB7DIR PB6DIR PB5DIR PB4DIR PB3DIR PB2DIR PB1DIR PB0DIR
value * * 1 0 1 * * *
As for PB5D-PB3D bit (PBD register:bit5-3), neither "0" nor "1" is problematic.
reg. name PBD register (Address:0F258H)
bit 7 6 5 4 3 2 1 0
bit name
PB7D PB6D PB5D PB4D PB3D PB2D PB1D PB0D
value * * ** ** ** * * *
* : no relation to the SSIO function **: Don’t care $: Optional