10. Registers > Error Management Extensions Block Registers
CPS-1848 User Manual
259
June 2, 2014
Formal Status
This document is confidential and is subject to an NDA.
Integrated Device Technology
10.7.12 Port {0..17} Capture 0 CSR
This register provides storage for capturing packets and long/short control symbols. For short control symbols, the full 32 bits
are used because the delimited control symbol is captured.
The
and the
–3, are writable by software to allow debug of the system
error recovery and threshold method. For debug, software must write the
Port {0..17} Attributes Capture CSR
to set the VALID
bit after writing the packet/control symbol information in the other capture registers.
For base address information, see
Port Error Management Register Base Addresses
Register Name: PORT_{0..17}_CAPT_0_CSR
Reset Value: 0x0000_00000
Register Offset: 0x (0x40 * port_num)
Bits
0
1
2
3
4
5
6
7
00:07
CAPT_0
08:15
CAPT_0
16:23
CAPT_0
24:31
CAPT_0
Bits
Name
Description
Type
Reset
Value
0:31
CAPT_0
4 Bytes of a delimited short Control Symbol, or Bytes 0:3 of a
delimited long Control symbol, or Bytes 0:3 of the Packet Header.
For control symbols, the most significant byte is the control
symbol delimiting special character.
Bit 22 indicates the type of timeout error:
0 = Package Acknowledge timeout
1 = Link-Response timeout
RW
0
