10. Registers > LP-Serial Extended Features Registers with Software Assisted Error Recovery
CPS-1848 User Manual
234
June 2, 2014
Formal Status
This document is confidential and is subject to an NDA.
Integrated Device Technology
10.5.7
Port {0..17} Local ackID CSR
Before changing the contents of this register, ensure that
Port {0..17} Error and Status CSR
[OUTPUT_FAIL] is clear
and will remain clear. Changing this register when OUTPUT_FAIL is set will result in undefined device operation.
For base address information, see
Port {0..17} S-RIO Extended Features Base Addresses
Register Name: PORT_{0..17}_LOCAL_ACKID_CSR
Reset Value: 0x0000_0000
Register Offset: 0x (0x20 * port_num)
Bits
0
1
2
3
4
5
6
7
00:07
CLR
Reserved
INBOUND
08:15
Reserved
16:23
Reserved
OUTSTD
24:31
Reserved
OUTBOUND
Bits
Name
Description
Type
Reset
Value
0
CLR
1 = Discard all outstanding unacknowledged packets. This bit
should be written only when trying to recover a failed link. This bit
will return 0 when read.
WO
0
1
Reserved
Reserved
RO
0
2:7
INBOUND
Input port next expected ackID.
Note: Bit 2 is available only when IDLE2 is in use on the link.
Note: This field is cleared when PORT_DIS is set to 1 in the
RW
0
8:17
Reserved
Reserved
RO
0
18:23
OUTSTD
The output port unacknowledged ackID status. The next
acknowledge control symbol ackID field that indicates the ackID
value expected in the next received acknowledge control symbol.
Note: Bit 18 is available only when IDLE2 is in use on the link.
Note: This field is cleared when PORT_DIS is set to 1 in the
RW
0
24:25
Reserved
Reserved
RO
0
26:31
OUTBOUND
The next transmitted ackID value for the port. Writing this value
can force retransmission of outstanding unacknowledged packets
in order to manually use error recovery.
Note: Bit 26 is available only when IDLE2 is in use on the link.
Note: This field is cleared when PORT_DIS is set to 1 in the
RW
0
