2. RapidIO Ports > Packet Transfer Validation and Debug
CPS-1848 User Manual
67
June 2, 2014
Formal Status
This document is confidential and is subject to an NDA.
Integrated Device Technology
The configuration and status values for the port that are relevant to packet transmission are listed in
.
Table 19: Configuration and Status Values to Check – Switch Cannot Transmit Packets
Packet Counter Register
Bit Field
Debug Notes
Port {0..17} Error and Status CSR
PORT_OK
If this bit is 0, the link is not connected to the
link partner. For more information, see the
Debugging IDT S-RIO Gen2 Switches Using
RapidFET JTAG Application Note, available
from www.idt.com.
PORT_ERR
The standard hardware error recovery has
failed. Packets will not be transmitted until this
state is cleared. The switch may be configured
to drop packets in this state. For information
on recovery, see
.
OUTPUT_ERR_STOP
If this bit is set to 1, the switch output port has
detected an error, and error recovery is not
complete. Packets will not be transmitted until
OUTPUT_ERR_STOP has been cleared.
Check that the
has been initialized according to the
guidelines in
Check that the link partner configuration and
status will allow it to complete error recovery
and accept packets.
OUTPUT_DROP
If this bit is set to 1, the port has dropped at
least one packet.
OUTPUT_FAIL
If this bit is set to 1, the port has detected a
failure condition, and may be configured to
halt packet transmission and/or to drop
packets (for more information, see
PORT_DIS
This bit must be cleared to allow the port to
train.
OUTPUT_PORT_EN
This bit must be set to allow the port to
transmit non-maintenance packets.
For Revision C of the CPS-1848, the reset
value for this bit is 1; for Revision A/B, the
reset value is 0.
PORT_LOCKOUT
This bit must be cleared to transmit any
packets.
Port {0..17} Implementation Specific
Error Detect Register
TX_DROP
Packet transmission has been disabled (see
OUTPUT_PORT_EN in
).