6. Event Management > Event Clearing and Recovery
CPS-1848 User Manual
166
June 2, 2014
Formal Status
This document is confidential and is subject to an NDA.
Integrated Device Technology
6.5.2.1.4
All fields defined for this register are supported.
6.5.2.1.5
Clear Outstanding ackIDs
The CLR bit in the
is write only. When set to 1, the S-RIO port handles all previously transmitted
packets for which acks have not been received as having been properly received from the link partner. Acknowledgment
processing for these packets is then no longer required.
6.5.2.1.6
Inbound ackID
Each S-RIO port supports both reads from and writes to the INBOUND field in the
. If read, the
S-RIO port will return the value of the expected ackID of the next received packet.
If written, this field will set the expected ackID for the next received packet to the value supplied with the write. If the port
receiver is in a stopped state it returns to the normal operational state after updating the expected ID value. If a packet is
received during this transition, it is dropped without response.
6.5.2.1.7
Outbound ackID
Each S-RIO port supports both reads from and writes to the OUTBOUND field in the
. If read, the
S-RIO port will return to the value that the device will use for the next transmitted packet.
If written, the effect depends on whether or not there are outstanding ackIDs. If there are no outstanding ackIDs, the next
transmitted packet will use the ackID written into this register. If there are outstanding ackIDs, the packets that have been
previously transmitted (without the device having received an acknowledgement), are retransmitted using ackIDs that start
from the value written into this register.
6.5.2.1.8
Outstanding ackID
Each S-RIO port supports both reads from and writes to the OUTSTD field in the
. If read, this
field indicates the value of the next expected acknowledgement (ackID field of control symbol) from the port’s link partner.
6.5.2.2
Clearing and Handling Port Fail and Port Degraded Events
To clear a Port Degraded threshold event, the following register accesses must be performed in the order listed. Once done,
this clears the detected errors, and enables information to be captured for new errors:
1. Disable the events feeding the
.ERR_RATE_CNTR.
2. Clear the
.ERR_RATE_CNTR.
3. Clear the
Port {0..17} Error and Status CSR
.PW_PNDG.
4. Re-enable events that supplied
.ERR_RATE_CNTR.
To clear a Port Fail threshold event, the following register accesses must be performed in the order listed. Once done, this
clears the detected errors, disables the PORT_FAIL isolation function, and enables information to be captured for new errors:
1. Disable the events feeding the
.ERR_RATE_CNTR.
2. Clear the
.ERR_RATE_CNTR.
3. Clear the
Port {0..17} Error and Status CSR
.PW_PNDG.
4. Reset the port using a reset request from the link partner, or through the
Device Reset and Control Register
5. Clear up any error conditions resulting from the per-port reset (see
).
Before changing the contents of
[OUTPUT_FAIL] is clear and will remain clear. Changing this register when OUTPUT_FAIL is set
will result in undefined device operation.
