10. Registers > IDT Specific Event Notification Control Registers
CPS-1848 User Manual
300
June 2, 2014
Formal Status
This document is confidential and is subject to an NDA.
Integrated Device Technology
10.10.13 Lane {0..47} Error Report Enable Register
Each bit in this register can enable/disable reporting of an error type using interrupt, port-write, and error log. For base address
information, see
Lane n Error Report Enable Base Addresses
. The broadcast version of this register is
. For more information on the use of this register, see
support requires exclusive use of these registers. No Standard Physical Layer Errors can be
enabled when Hot Extraction/Insertion functionality is required.
Register Name: LANE_{0..47}_ERR_RPT_EN
Reset Value: 0x0000_0000
Register Offset: 0x (0x100 * lane_num)
Bits
0
1
2
3
4
5
6
7
00:07
Reserved
08:15
Reserved
16:23
Reserved
UNUSED
BAD_SPEE
D_EN
LANE_INV
ER_DET_E
N
24:31
IDLE2_FRA
ME_EN
Reserved
TX_RX_MIS
MATCH_EN
DESCRAM
_SYNC_EN
BAD_CHA
R_EN
LANE_RDY
_EN
LANE_SYN
C_EN
Bits
Name
Description
Type
Reset
Value
0:18
Reserved
Reserved
RO
0
19:21
UNUSED
Reserved
RW
0
22
BAD_SPEED_EN 1 = Enable reporting of the corresponding error in the
RW
0
23
LANE_INVER_DE
T_EN
1 = Enable reporting of the corresponding error in the
RW
0
24
IDLE2_FRAME_EN
1 = Enable reporting of the corresponding error in the
RW
0
25:26
Reserved
Reserved
RW
0
27
TX_RX_MISMATC
H_EN
1 = Enable reporting of the corresponding error in the
RW
0
28
DESCRAM_SYNC
_EN
1 = Enable reporting of the corresponding error in the
RW
0
29
BAD_CHAR_EN
1 = Enable reporting of the corresponding error in the
RW
0
30
LANE_RDY_EN
1 = Enable reporting of the corresponding error in the
RW
0
31
LANE_SYNC_EN 1 = Enable reporting of the corresponding error in the
RW
0