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5-138
C70 Capacitor Bank Protection and Control System
GE Multilin
5.6 GROUPED ELEMENTS
5 SETTINGS
5
banks is proportional to the positive-sequence component of the total current of the two banks. This setting defines the
angle of the proportionality factor. Quality of balancing the bank with a given value of this setting can be viewed under
ACTUAL VALUES
menu. An automatic setting procedure is available under the
COMMANDS
menu to calculate the com-
pensating factor automatically. Refer to the
Theory of operation
chapter for more information regarding the meaning of
the inherent unbalance compensating factor of this protection method.
•
NTRL CUR UNBALCE 1 STG1 PKP
to
NTRL CUR UNBALCE 1 STG4 PKP
: These settings specify pickup thresh-
olds for stages 1 through 4 in per-units (pu) of the nominal current of the ground current channel of the bank source. A
value of 1 pu is the nominal secondary current, or the nominal primary current, respectively, as configured under the
bank source of this function.
•
NTRL CUR UNBALCE 1 STG1 SLOPE
to
NTRL CUR UNBALCE 1 STG4 SLOPE
: These settings specify the slopes
for stages 1 through 4. The slope setting is applied if the phase CTs are configured under the bank source. The magni-
tude of the zero-sequence current is applied as a restraining signal. Typically few percent of slope is enough to ensure
security of the function. The factor compensating for the inherent bank unbalance zeroes out the operating signal
under relatively balanced bank currents. If the said currents contain a significant zero sequence component, the quality
of compensation is lower, hence the need for the restraint, and this slope setting. Refer to the
Theory of operation
chapter for more information on this protection method.
•
NTRL CUR UNBALCE 1 STG1 DEL
to
NTRL CUR UNBALCE 1 STG4 DEL
: This setting specifies the pickup time
delay, individually per each stage of alarming/tripping. The timers use a common drop out time delay specified by the
next setting.
•
NTRL CUR UNBALCE 1 DPO DELAY
: This setting controls a drop out delay for the operate FlexLogic™ operands.
Note that individual stages apply individually configurable pickup delays, but use this common drop out delay.
•
NTRL CUR 1 BLK STG1
to
NTRL CUR 1 BLK STG4
: These settings are used to block the function on a per stage
basis when required. At minimum this function shall be blocked when the two banks are not paralleled. Note that when
unblocked, the function becomes operational after five cycles of intentional delay. High-set instantaneous protection on
energization can be provided by a separate instantaneous overcurrent function.
Summary of Contents for UR Series C70
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Page 10: ...x C70 Capacitor Bank Protection and Control System GE Multilin TABLE OF CONTENTS ...
Page 344: ...5 220 C70 Capacitor Bank Protection and Control System GE Multilin 5 10 TESTING 5 SETTINGS 5 ...
Page 586: ...D 10 C70 Capacitor Bank Protection and Control System GE Multilin D 1 OVERVIEW APPENDIXD D ...