Garmin APOLLO GX SERIES, Service Manual

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© 2004 Garmin AT GX Service Manual 6-1
Chapter 6. Theory of Operation
Apollo GX50/55/60/65 Description
The Apollo GX50 GPS is a TSO-C129a, Class A1 GPS navigation receiver for IFR en route, terminal,
and non-precision approach operation.
The Apollo GX55 GPS is TSO-C129 en route and terminal approved navigation receiver and is a pin
compatible slide in replacement for Apollo panel mounted LORANs and FlyBuddy GPS models.
The Apollo GX60 GPS/Comm includes the same GPS capabilities as the GX50 and includes a 760
channel VHF Comm transceiver.
The Apollo GX65 includes the same GPS and Comm capabilities as the GX 60, but is TSO-C129a,
Class A2 certified (not for non-precision approach operation).
These units all feature a high-resolution, daylight readable graphics display moving map. A database
is provided by means of a plug-in PCMCIA data card for convenience in changing and updating the
database.
NAV Board Theory of Operation
The navigation functions of the GX series GPS receivers are provided by the navigation computer
board (NAV board) which directly interfaces with an 8-channel GPS receiver module designed
specifically for high performance aviation use. The GPS receiver module provides present position
(latitude and longitude) date, time, RAIM and miscellaneous other satellite data to the NAV board.
The NAV board provides navigation functions between waypoints, such as bearing, range, estimated
time en route, estimated time of arrival, ground speed, course deviation, track angle and desired
track.
The plug-in database provides detailed information about airports, SUA, VORs, NDBs, and
intersections. The NAV board permits storage of user defined waypoints.
The navigation function is always active. When other functions are used (except in Test Mode and
Simulator Mode), the navigation function continues to run
in the background
.
Microprocessor
The microprocessor (U3) used in the GX series NAV boards is an Intel 386EX embedded
microprocessor. The i386EX is based on the static Intel 386 SX processor. The i386 EX has a 16-bit
data bus and 26-bit address bus. Performance of the i386 EX is similar to that of the i386 SX at the
same speeds. The system clock operates at 16 MHz.
In addition to the processor core, the i386 EX includes integrated peripherals such as:
•
Interrupt Control Unit (ICU)
•
Timer/counter Unit (TCU)
•
Asynchronous Serial I/O (SIO)
•
Direct Memory Access (DMA) controller
•
System Management Mode (SMM)
•
Clock and power management unit
•
Synchronous Serial I/O (SSIO)
•
Chip-select Unit (CSU)
•
Refresh Control Unit (RCU)