II-112
EPSON
S1C6S3N2 TECHNICAL SOFTWARE
CHAPTER 7: SUMMARY OF NOTES
(1) Correct read-out is impossible when there is a carry from
the low order bit (SWL) to the high order bit (SWH).
Hence, when reading out the counter data in the RUN
status, the counter must first be stopped, and then the
RUN status returned again.
Also, the duration of the above STOP status must be
within 976 µs (256 Hz 1/4 cycle).
(2) Resetting the clock timer has no effect on the stopwatch
counter, and vice versa.
(3) When using arithmetic instructions (AND, OR, ADD,
SUB, etc.) for writing to the interrupt mask registers
(EISWIT), pay attention to the control of BLD.
(4) Regardless of the setting of the mask register (EISWIT),
the interrupt factor flag (SWIT) is set to "1" when the
corresponding counter overflows.
To prevent erroneous reading of the event counter data, read
out the counter data multiple times for comparison, and use
the matching data for the result.
(1) To keep the current consumption low, set the analog
comparator to OFF when it is not needed.
(2) After AMPON is set to "1", allow a wait of at least 5 ms for
the analog comparator's operation to stabilize before
reading out the analog comparator's output data AMPDT.
– Stopwatch Counter
– Event Counter
– Analog Comparator
Summary of Contents for S1C6S3N2
Page 4: ......
Page 6: ......
Page 7: ...Hardware Hardware S1C6S3N2 I Technical Hardware ...
Page 8: ......
Page 141: ...Software Software S1C6S3N2 II Technical Software ...
Page 142: ......
Page 146: ......