Analog Devices ADuCM320, Hardware Reference Manual

Page: 97 / 196

ADuCM320 Hardware Reference Manual UG-498
Rev. C | Page 97 of 196
Address Name Description Reset RW
0x40020244 GP5OE GPIO Port 5 output enable 0x00 RW
0x40020248 GP5PUL GPIO Port 5 pull-down enable 0x0 RW
0x4002024C GP5IE GPIO Port 5 input path enable 0xF RW
0x40020250 GP5IN GPIO Port 5 registered data input 0xXX R
0x40020254 GP5OUT GPIO Port 5 data output 0x0 RW
0x40020258 GP5SET GPIO Port 5 data out set 0x0 W
0x4002025C GP5CLR GPIO Port 5 data out clear 0x0 W
0x40020260 GP5TGL GPIO Port 5 pin toggle 0x0 W
0x40020264 GP5ODE GPIO Port 5 open-drain enable 0x0 RW
REGISTER DETAILS: DIGITAL I/O
Note that not all bits are accessible to the user on some ports. Inaccessible bits are reserved and must be ignored. See Table 121 for more
details on the accessible bits.
GPIO Port Configuration Registers
Address: 0x40020000, Reset: See Table 122 , Name: GP0CON
Address: 0x40020040, Reset: See Table 122 , Name: GP1CON
Address: 0x40020080, Reset: See Table 122 , Name: GP2CON
Address: 0x400200C0, Reset: See Table 122 , Name: GP3CON
Address: 0x40020100, Reset: See Table 122 , Name: GP4CON
Address: 0x40020240, Reset: See Table 122 , Name: GP5CON
Table 123. Bit Descriptions for GP0CON, GP1CON, GP2CON, GP3CON, GP4CON, and GP5CON
Bits Bit Name Description Reset Access
[15:14] CON7 Configuration bits for Port x.7. See Table 121. 1 See Table 122 RW
[13:12] CON6 Configuration bits for Port x.6. See Table 121. See Table 122 RW
[11:10] CON5 Configuration bits for Port x.5. See Table 121. See Table 122 RW
[9:8] CON4 Configuration bits for Port x.4. See Table 121. See Table 122 RW
[7:6] CON3 Configuration bits for Port x.3. See Table 121. See Table 122 RW
[5:4] CON2 Configuration bits for Port x.2. See Table 121. See Table 122 RW
[3:2] CON1 Configuration bits for Port x.1. See Table 121. See Table 122 RW
[1:0] CON0 Configuration bits for Port x.0. See Table 121. See Table 122 RW
1 Where x is 0 for Port 0, 1 for Port 1, 2 for Port 2, and 3 for Port 3.
GPIO Port Output Enable Registers
Address: 0x40020004, Reset: 0x00, Name: GP0OE
Address: 0x40020044, Reset: 0x00, Name: GP1OE
Address: 0x40020084, Reset: 0x00, Name: GP2OE
Address: 0x400200C4, Reset: 0x00, Name: GP3OE
Address: 0x40020104, Reset: 0x00, Name: GP4OE
Address: 0x40020244, Reset: 0x00, Name: GP5OE
Table 124. Bit Descriptions for GP0OE, GP1OE, GP2OE, GP3OE, GP4OE, and GP5OE
Bits Bit Name Description Reset Access
[7:0] OE Pin output drive enable See Table 122 RW
0: disable the output on the corresponding GPIO
1: enable the output on the corresponding GPIO