Analog Devices ADuCM320, Hardware Reference Manual

Page: 143 / 196

ADuCM320 Hardware Reference Manual UG-498
Rev. C | Page 143 of 196
Bits Bit Name Description Reset Access
3 PEN Parity enable. Used to control of the parity bit transmitted and checked.
The value transmitted and the value checked are based on the settings of
EPS and SP.
0x0 RW
0: parity is not transmitted or checked
1: parity is transmitted and checked
2 STOP Stop bit. Used to control the number of stop bits transmitted. In all cases,
only the first stop bit is evaluated on data received. 0x0 RW
0: send 1 stop bit regardless of the word length (WLS).
1: send a number of stop bits based on the word length. Transmit 1.5 stop
bits if the word length is 5 bits (WLS = 00), or 2 stop bits if the word length
is 6 (WLS = 01), 7 (WLS = 10), or 8 bits (WLS = 11).
[1:0] WLS Word length select. Selects the number of bits per transmission. 0x0 RW
00: 5 bits
01: 6 bits
10: 7 bits
11: 8 bits
Modem Control Register
Address: 0x40005010, Reset: 0x0000, Name: COMMCR
Table 200. Bit Descriptions for COMMCR
Bits Bit Name Description Reset Access
[15:5] RESERVED Reserved. 0x0 R
4 LOOPBACK Loopback mode. In loop back mode, the SOUT is forced high. The modem
signals are also directly connected to the status inputs (RTS to CTS, DTR to
DSR, OUT1 to RI, and OUT2 to DCD). 0x0 RW
0: normal operation, loopback disabled
1: loopback enabled
3 OUT2 Output 2. 0x0 RW
0: force OUT2 to a Logic 1
1: force OUT2 to a Logic 0
2 OUT1 Output 1. 0x0 RW
0: force OUT1 to a Logic 1
1: force OUT1 to a Logic 0
1 RTS Request to send. 0x0 RW
0: force RTS to a Logic 1
1: force RTS to a Logic 0
0 DTR Data Terminal Ready. 0x0 RW
0: force DTR to a Logic 1
1: force DTR to a Logic 0