Chapter 6. DMA Controller
55
DMA Page Register
Register: DMA Page
Address
Access: Read and Write
A23
A22
A21
A20
A19
A18
A17
A16
7
6
5
4
3
2
1
0
DMA Page Register
† See the "DMA Page I/O Port Addressing" table earlier in this chapter.
DMA Extended Page Register
Register: DMA Extended Page
Address
Access: Read and Write
A31
A30
A29
A28
A27
A26
A25
A24
7
6
5
4
3
2
1
0
DMA Extended Page Register
† See the "DMA Extended Page (A24-31) I/O Port Addressing" table earlier in this chapter.
ADDITIONAL INFORMATION
•
For more information on the operating system's use of the interrupt inputs, refer to the
Ziatech
Industrial Computer System Manual
.
•
For more information on the 8237 DMA controller operating modes, refer to the Intel™
Peripherals
Components, 1995
data book.
•
Information on the DMA Controller may be found in the ALI®
Preliminary Data Sheet, Sept. 1994
for the Aladdin™ chipset (part #1449).
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