APPENDIX D. PCI CONFIGURATION SPACE MAP
All PCI compliant devices contain a PCI configuration header. The generic layout of the header is
shown in the "PCI Configuration Header" diagram on the following page.
Additionally, a device may contain unique configuration registers (at location > 40h). For the ZT 8905,
these are shown in the "ZT 8905 On-Board Device PCI Bus Mapping" table shown below.
Details for each device's configuration space can be found in the respective manufacturer's data
manuals. For more information on the PCI chipset implemented on the ZT 8905, refer to the
Aladdin™ M1461/M1449 3.3-Volt Pentium Chip Set Preliminary Data Sheet, Rev. D
, or contact ALI®
Pacific Technology Group at (408) 764-0644.
ZT 8905 On-Board Device PCI Bus Mapping
Bus #
(hex)
Dev #
(hex)
Fcn #
(hex)
Vendor
ID
Device
ID
Description
00
00
00
10B9
1461
Aladdin M1461 Memory Controller
00
01
00
1138
8905
Ziatech PCI-to-STD Bridge
00
02
00
10B9
1449
Aladdin M1449 PCI-to-ISA Bridge
00
03
00
†
†
Mezzanine Connector
† The vendor and device ID will vary depending upon the device plugged into the mezzanine
connector.
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Содержание ZT 8905
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