Chapter 8. Serial Controller
64
Divisor Latch LSB and MSB
Register: Divisor Latch LSB
Address: 2F8/3F8h DIV=1
Access: Read and Write
D7
D6
D5
D4
D3
D2
D1
D0
7
6
5
4
3
2
1
0
Divisor Latch LSB
Register: Divisor Latch MSB
Address: 2F9/3F9h DIV=1
Access: Read and Write
D15
D14
D13
D12
D11
D10
D9
D8
7
6
5
4
3
2
1
0
Divisor Latch MSB
Interrupt Control Register
Register: Interrupt Control
Address: 2F9/3F9h DIV=0
Access: Read and Write
0
MSI
LSI
TBI
RBI
7
6
5
4
3
2
1
0
0
0
0
Receive Buffer Interrupt
0 Disabled
1 Enabled
Transmit Buffer Interrupt
Line Status Interrupt
Modem Status Interrupt
0 Disabled
1 Enabled
0 Disabled
1 Enabled
0 Disabled
1 Enabled
Interrupt Control Register
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Содержание ZT 8905
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