Chapter 2. Getting Started
12
MEMORY CONFIGURATION
The ZT 8905 addresses up to 4 Gbytes of memory. The address space is divided between memory
local to the board, memory located on the PCI expansion interface, and memory on the STD bus.
Any memory not reserved or occupied by a local memory device (DRAM/Flash) or the STD bus is
available for PCI bus expansion. The memory address regions available for the STD bus are
configured through the BIOS SETUP mechanism. During local memory operations, the STD bus is
held static to decrease system electrical noise and power consumption.
STD bus memory is supported through either Standard Architecture (SA8 or SA16) transfers, or
Extended Architecture (EA8, EA16, or EA32) transfers. The ZT 8905 supports the STD bus wait
request signal, WAITRQ*, to interface to SA memory boards with longer access time requirements
than those defined by the STD-80 and STD 32 specifications. The signal EXRDY is supported for EA
peripherals that require additional transfer time.
The ZT 8905 is populated with several memory devices. Local DRAM is contained in a unique
stackable memory architecture that supports up to 48 Mbytes of DRAM (using 16-Mbit DRAM
technology). Each module is either 4 Mbytes or 8 Mbytes. Memory modules must be added in pairs
due to the 64-bit memory architecture of the Pentium processor. Each layer of DRAM (up to three
layers) must be configured differently to allow the stacked module to provide discrete addressing for
the layer pair.
Additional DRAM may be installed on the ZT 8905 after the system has been purchased. Before
contacting Ziatech to order additional DRAM, please take a moment to determine the amount of
DRAM that is already loaded (how many layers and what size). The "Typical DRAM Configurations"
table below lists the typical DRAM configurations that are possible with the ZT 8905. Single sided
DRAM modules have DRAM on just one surface. Double sided DRAM modules have DRAM on both
sides.
Local Flash memory is soldered directly to the board. There is space for one Flash device, which may
be either a 2 Mbyte or a 4 Mbyte device. The 2 Mbyte device does not r12 V operation. The
4 Mbyte device does r12 V +/- 5% for programming operations.
The "Memory Address Map" illustration on the following page shows default memory addressing for
the ZT 8905.
Typical DRAM Configurations
Total System
Memory
Number and Type of Modules
8 Mbytes
Two 4-Mbyte modules (layer 1)--single sided
16 Mbytes †
Four 4-Mbyte modules (layers 1 & 2)--single sided
16 Mbytes
Two 8-Mbyte modules (layer 1)--double sided
32 Mbytes
Four 8-Mbyte modules (layers 1 & 2)--double sided
48 Mbytes
Six 8-Mbyte modules (layers 1, 2 & 3)--double sided
† Upgraded systems only
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Содержание ZT 8905
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