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251
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6 F 2 S 0 8 4 6
VT failure detection is checked as follows:
•
Set the circuit breaker closed condition by applying a "1" signal to binary inputs BI1, BI2 and
BI3.
•
Press 5 (= Logic circuit) on the "Test" screen to display the "Logic circuit" screen.
•
Enter signal number 172 for the TermA line to observe the VT failure alarm signal, and 173
for the TermB line to observe the VT failure detection signal at monitoring jack A and B. Press
the ENTER key.
•
Apply a three-phase rated voltage. Then, remove single-, two- or three-phase voltage. Check
that the signals are instantly observed at jack B and observed at jack A after a 10s delay.
Blocking of the voltage-dependent protection is checked as follows:
•
Apply a three-phase rated voltage. Then, remove single-, two- or three-phase voltage and at
the same time apply a zone 1 fault. During this process, do not change the current.
Check that neither zone 1 tripping nor command tripping takes place.
•
In the similar manner, apply a zone 1 extension, zone 2 or zone 3 fault and check that tripping
does not take place.
Check that VT failure is recorded on the event record.
Power swing blocking
A power swing is detected when the condition that the PSBSOUT element operates and PSBSIN
element and residual overcurrent element EFL do not operate, for a period of TPSB setting or
more.
Power swing detection is checked as follows:
•
Press 5 (= Logic circuit) on the "Test" screen to display the "Logic circuit" screen.
•
Enter signal number 176 for the TermA line to observe the power swing blocking signal at
monitoring jack A and press the ENTER key.
•
Apply a phase fault which is set to midway between PSBSIN and PSBSOUT. Check that the
signal is generated with a delay of TPSB setting after the PSBSOUT operates. The PSBSOUT
operating time will be 1-2 cycles.
•
Reset the fault and check that the monitoring signal resets with a 500ms delay after PSBSOUT
resets.
•
Apply an earth fault which is set to midway between PSBSIN and PSBSOUT. Check that the
signal is not generated.
Power swing blocking is checked as follows:
•
Apply a zone 1 phase fault after generating the power swing blocking signal. The blocking
signal is generated in the way as mentioned above. Check that zone 1 tripping takes place if
scheme switch [PSB-Z1] is set to "Off" and does not take place if set to "On".
•
In the similar manner, apply zone 1x, zone 2, zone 3, zone F, zone R1 and zone R2 faults, and
check that tripping takes place or does not take place depending on the "On" or "Off" setting of
scheme switch [PSB-Z1X], [-Z2], [-Z3], [-ZF], [-ZR1] and [-ZR2].
Check that power swing blocking is recorded on the event record.
Содержание GRZ100 B Series
Страница 264: ... 263 6 F 2 S 0 8 4 6 Appendix A Block Diagram ...
Страница 271: ... 270 6 F 2 S 0 8 4 6 ...
Страница 272: ... 271 6 F 2 S 0 8 4 6 Appendix B Signal List ...
Страница 307: ... 306 6 F 2 S 0 8 4 6 ...
Страница 308: ... 307 6 F 2 S 0 8 4 6 Appendix C Variable Timer List ...
Страница 310: ... 309 6 F 2 S 0 8 4 6 Appendix D Binary Input Output Default Setting List ...
Страница 321: ... 320 6 F 2 S 0 8 4 6 ...
Страница 322: ... 321 6 F 2 S 0 8 4 6 Appendix E Details of Relay Menu and LCD Button Operation ...
Страница 331: ... 330 6 F 2 S 0 8 4 6 ...
Страница 340: ... 339 6 F 2 S 0 8 4 6 Appendix G Typical External Connections ...
Страница 377: ... 376 6 F 2 S 0 8 4 6 ...
Страница 384: ... 383 6 F 2 S 0 8 4 6 Appendix J Return Repair Form ...
Страница 388: ... 387 6 F 2 S 0 8 4 6 Customer Name Company Name Address Telephone No Facsimile No Signature ...
Страница 389: ... 388 6 F 2 S 0 8 4 6 ...
Страница 390: ... 389 6 F 2 S 0 8 4 6 Appendix K Technical Data ...
Страница 401: ... 400 6 F 2 S 0 8 4 6 ...
Страница 402: ... 401 6 F 2 S 0 8 4 6 Appendix L Symbols Used in Scheme Logic ...
Страница 405: ... 404 6 F 2 S 0 8 4 6 ...
Страница 406: ... 405 6 F 2 S 0 8 4 6 Appendix M Example of Setting Calculation ...
Страница 417: ... 416 6 F 2 S 0 8 4 6 ...
Страница 418: ... 417 6 F 2 S 0 8 4 6 Appendix N IEC60870 5 103 Interoperability and Troubleshooting ...
Страница 430: ... 429 6 F 2 S 0 8 4 6 Appendix O Programmable Reset Characteristics and Implementation of Thermal Model to IEC60255 8 ...
Страница 434: ... 433 6 F 2 S 0 8 4 6 Appendix P Inverse Time Characteristics ...
Страница 437: ... 436 6 F 2 S 0 8 4 6 ...
Страница 438: ... 437 6 F 2 S 0 8 4 6 Appendix Q Failed Module Tracing and Replacement ...
Страница 444: ... 443 6 F 2 S 0 8 4 6 Appendix R Ordering ...
Страница 447: ......