⎯
84
⎯
6 F 2 S 0 8 4 6
2.4.11 Breaker Failure Protection
When fault clearance fails due to a breaker failure, the breaker failure protection (BFP) clears the
fault by backtripping adjacent circuit breakers.
If the current continues to flow even after a trip command is output, the BFP judges it as a breaker
failure. The existence of the current is detected by an overcurrent element provided for each phase.
For high-speed operation of the BFP, a high-speed reset overcurrent element is used.
In order to prevent the BFP from starting by accident during maintenance work and testing, and
thus tripping adjacent breakers, the BFP has the optional function of retripping the original
breaker. To make sure that the breaker has actually failed, a trip command is made to the original
breaker again before tripping the adjacent breakers to prevent unnecessary tripping of the adjacent
breakers following the erroneous start-up of the BFP. It is possible to choose not to use retripping
at all, or use retripping with trip command plus delayed pick-up timer, or retripping with trip
command plus overcurrent detection plus delayed pick-up timer.
Tripping by the BFP is three-phase final tripping and autoreclose is blocked.
An overcurrent element and delayed pick-up timer are provided for each phase which also operate
correctly during the breaker failure routine in the event of an evolving fault.
Scheme logic
The BFP is performed on an individual phase basis. Figure 2.4.11.1 shows the scheme logic for
one phase. The BFP is started by an initiation signal EXT_CBFIN from the external line
protection or an internal initiation signal CBF_INIT. The external initiation signals
EXT_CBFIN-A, -B, -C are assigned by binary input signals (PLC signals). Starting with an
external initiation signal can be disabled by the scheme switch [BFEXT]. These signals must
continuously exist as long as the fault is present.
&
&
≥
1
50 - 500ms
t 0
TBF1
t 0
692:CBF_RETRIP
[BF1]
[BF1]
[BF2]
"ON"
"ON"
[BFEXT]
"T"
"TOC"
(Trip adjacent breakers)
(Trip original breaker)
CBF INIT-A, -B, -C
200:CBF_TRIP
OCBF
81:OCBF-A
82:OCBF-B
83:OCBF-C
EXT_CBFIN-A
1560
EXT_CBFIN-B
1561
EXT_CBFIN-C
1562
693:CBF_TRIP-A
694:CBF_TRIP-B
695:CBF_TRIP-C
196:CBF_RETRIP-A
197:CBF_RETRIP-B
198:CBF_RETRIP-C
50 - 500ms
TBF2
t 0
CBF_BLOCK
1640
1
&
Figure 2.4.11.1 BFP Scheme Logic
The backtripping signal to the adjacent breakers BF-TRIP is output if the overcurrent element
OCBF operates continuously for the setting time of the delayed pick-up timer TBF2 after
initiation. Tripping of adjacent breakers can be blocked with the scheme switch [BF2].
There are two kinds of modes of the retrip signal to the original breaker RETRIP, the mode in
which RETRIP is controlled by the overcurrent element OCBF, and the direct trip mode in which
RETRIP is not controlled. The retrip mode together with the trip block can be selected with the
scheme switch [BF1].
Figure 2.4.11.2 shows a sequence diagram for the BFP when a retrip and backup trip are used. If
the circuit breaker trips normally, the OCBF is reset before timer TBF1 or TBF2 is picked up and
the BFP is reset.
Содержание GRZ100 B Series
Страница 264: ... 263 6 F 2 S 0 8 4 6 Appendix A Block Diagram ...
Страница 271: ... 270 6 F 2 S 0 8 4 6 ...
Страница 272: ... 271 6 F 2 S 0 8 4 6 Appendix B Signal List ...
Страница 307: ... 306 6 F 2 S 0 8 4 6 ...
Страница 308: ... 307 6 F 2 S 0 8 4 6 Appendix C Variable Timer List ...
Страница 310: ... 309 6 F 2 S 0 8 4 6 Appendix D Binary Input Output Default Setting List ...
Страница 321: ... 320 6 F 2 S 0 8 4 6 ...
Страница 322: ... 321 6 F 2 S 0 8 4 6 Appendix E Details of Relay Menu and LCD Button Operation ...
Страница 331: ... 330 6 F 2 S 0 8 4 6 ...
Страница 340: ... 339 6 F 2 S 0 8 4 6 Appendix G Typical External Connections ...
Страница 377: ... 376 6 F 2 S 0 8 4 6 ...
Страница 384: ... 383 6 F 2 S 0 8 4 6 Appendix J Return Repair Form ...
Страница 388: ... 387 6 F 2 S 0 8 4 6 Customer Name Company Name Address Telephone No Facsimile No Signature ...
Страница 389: ... 388 6 F 2 S 0 8 4 6 ...
Страница 390: ... 389 6 F 2 S 0 8 4 6 Appendix K Technical Data ...
Страница 401: ... 400 6 F 2 S 0 8 4 6 ...
Страница 402: ... 401 6 F 2 S 0 8 4 6 Appendix L Symbols Used in Scheme Logic ...
Страница 405: ... 404 6 F 2 S 0 8 4 6 ...
Страница 406: ... 405 6 F 2 S 0 8 4 6 Appendix M Example of Setting Calculation ...
Страница 417: ... 416 6 F 2 S 0 8 4 6 ...
Страница 418: ... 417 6 F 2 S 0 8 4 6 Appendix N IEC60870 5 103 Interoperability and Troubleshooting ...
Страница 430: ... 429 6 F 2 S 0 8 4 6 Appendix O Programmable Reset Characteristics and Implementation of Thermal Model to IEC60255 8 ...
Страница 434: ... 433 6 F 2 S 0 8 4 6 Appendix P Inverse Time Characteristics ...
Страница 437: ... 436 6 F 2 S 0 8 4 6 ...
Страница 438: ... 437 6 F 2 S 0 8 4 6 Appendix Q Failed Module Tracing and Replacement ...
Страница 444: ... 443 6 F 2 S 0 8 4 6 Appendix R Ordering ...
Страница 447: ......