⎯
250
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6 F 2 S 0 8 4 6
element OCH operation. Z1 to Z4 can perform the SOTF tripping by setting.
The SOTF function is activated when the breaker has been open for timer TSOTF (0 – 300s)
setting and active for an additional 500ms after the breaker is closed.
The SOTF function is checked as follows:
•
Set the scheme switch [SOTF-OC] to "On" and [SOTF-Z] to "Off".
De-energize the binary input signals BI1 to BI3 (terminal number A4, B4 and A5 of terminal block
TB4) for more than TSOTF (0 – 300s) setting.
•
Energize the binary input signals and apply a zone 1 fault at the same time.
Check that the operating time is within 1-1.5 cycle.
•
Set the scheme switch [SOTF-OC] to "Off" and [SOTF-Z] to "On" and repeat the above.
Breaker failure tripping
Set the scheme switch [BF1] to "T" or "TOC" and BF2 to "On".
•
Press 5 (= Logic circuit) on the "Test" screen to display the "Logic circuit" screen.
•
Enter a signal number 199 for the TermA line to observe the retrip signal at monitoring jack A
and 200 for the TermB line to observe the adjacent circuit breaker trip signal at monitoring
jack B and press the ENTER key.
•
Apply a zone 1 fault and maintain it. Check that the retrip signal is generated after the time
setting of TBF1 and the adjacent circuit breaker trip signal is generated after the time setting of
the TBF2.
Out-of-step tripping
Set the scheme switch [OST] to "On".
To simulate out-of-step, the impedance seen by the OST element must be moved slowly from the
first quadrant to the second quadrant or vice versa.
The following shows the case of the former.
•
Press 5 (= Logic circuit) on the "Test" screen to display the "Logic circuit" screen.
•
Enter signal number 203 for the TermA line to observe the out-of-step tripping signal at
monitoring jack A and press the ENTER key.
•
Apply a three-phase rated voltage and current.
•
Gradually lower the voltage to zero, keeping the voltage and current sources in-phase. Then
gradually raise the voltage from zero to the rated value, while keeping the phase angle of
voltage and current in anti-phase.
During this process, keep the current at the rated value.
•
Check that out-of-step tripping takes places at monitoring jack A.
•
Check that out-of-step tripping does not take place if the voltage was lowered or raised steeply
or was gradually raised while retaining the phase angle of voltage and current in-phase, not
anti-phase.
Voltage transformer failure supervision
A voltage transformer (VT) failure is detected when an undervoltage element or residual
overvoltage element operates but a current change detection element or residual overcurrent
element does not operate accordingly.
Содержание GRZ100 B Series
Страница 264: ... 263 6 F 2 S 0 8 4 6 Appendix A Block Diagram ...
Страница 271: ... 270 6 F 2 S 0 8 4 6 ...
Страница 272: ... 271 6 F 2 S 0 8 4 6 Appendix B Signal List ...
Страница 307: ... 306 6 F 2 S 0 8 4 6 ...
Страница 308: ... 307 6 F 2 S 0 8 4 6 Appendix C Variable Timer List ...
Страница 310: ... 309 6 F 2 S 0 8 4 6 Appendix D Binary Input Output Default Setting List ...
Страница 321: ... 320 6 F 2 S 0 8 4 6 ...
Страница 322: ... 321 6 F 2 S 0 8 4 6 Appendix E Details of Relay Menu and LCD Button Operation ...
Страница 331: ... 330 6 F 2 S 0 8 4 6 ...
Страница 340: ... 339 6 F 2 S 0 8 4 6 Appendix G Typical External Connections ...
Страница 377: ... 376 6 F 2 S 0 8 4 6 ...
Страница 384: ... 383 6 F 2 S 0 8 4 6 Appendix J Return Repair Form ...
Страница 388: ... 387 6 F 2 S 0 8 4 6 Customer Name Company Name Address Telephone No Facsimile No Signature ...
Страница 389: ... 388 6 F 2 S 0 8 4 6 ...
Страница 390: ... 389 6 F 2 S 0 8 4 6 Appendix K Technical Data ...
Страница 401: ... 400 6 F 2 S 0 8 4 6 ...
Страница 402: ... 401 6 F 2 S 0 8 4 6 Appendix L Symbols Used in Scheme Logic ...
Страница 405: ... 404 6 F 2 S 0 8 4 6 ...
Страница 406: ... 405 6 F 2 S 0 8 4 6 Appendix M Example of Setting Calculation ...
Страница 417: ... 416 6 F 2 S 0 8 4 6 ...
Страница 418: ... 417 6 F 2 S 0 8 4 6 Appendix N IEC60870 5 103 Interoperability and Troubleshooting ...
Страница 430: ... 429 6 F 2 S 0 8 4 6 Appendix O Programmable Reset Characteristics and Implementation of Thermal Model to IEC60255 8 ...
Страница 434: ... 433 6 F 2 S 0 8 4 6 Appendix P Inverse Time Characteristics ...
Страница 437: ... 436 6 F 2 S 0 8 4 6 ...
Страница 438: ... 437 6 F 2 S 0 8 4 6 Appendix Q Failed Module Tracing and Replacement ...
Страница 444: ... 443 6 F 2 S 0 8 4 6 Appendix R Ordering ...
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