Mitsubishi QCPU (Q Mode), Руководство пользователя

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MELSEC-Q
16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE PLC
SYSTEM
(1) Host PLC operation information area (0
H
to 1FF
H
)
(a) The following information is stored in the host PLC with multiple PLC
systems. These will all remain as 0 and will not change in the case of single
CPU systems. 1
Table 16.1 List of host PLC operation information area
CPU shared
memory
address
Name Detail Description
2
Corresponding
special register
0
H
Information
availability Information
availability flag
The area to confirm if information is stored in the host PLC's
operation information area (1
H
to 1F
H
,) or not.
• 0: Information not stored in the host PLC's operation
information area
• 1: Information stored in the host PLC's operation information
area
—
1
H
Diagnostic error
Diagnostic error
number
The numbers of errors during diagnostics is stored with BIN. SD0
2
H
The year and month that the error number was stored in the
CPU shared memory's 1
H
address is stored with two digits of the
BCD code.
SD1
3
H
The day and time that the error number was stored in the CPU
shared memory's 1
H
address is stored with two digits of the BCD
code.
SD2
4
H
Time the diagnosis
error occurred Time the diagnosis
error occurred
The minutes and seconds that the error number was stored in
the CPU shared memory's 1
H
address is stored with two digits of
the BCD code.
SD3
5
H
Error information
identification code Error information
identification code
Stores an identification code to determine what error information
has been stored in the common error information and individual
error information.
SD4
6
H
to
10
H
Common error
information Common error
information
The common information corresponding with the number of the
error during diagnostic is stored.
SD5
to
SD15
11
H
to
1B
H
Individual error
information Individual error
information
The individual information corresponding with the number of the
error during diagnostic is stored.
SD16
to
SD26
1C
H
Empty — Cannot be used —
1D
H
Switch status CPU switch status Stores the CPU module switch status. SD200
1E
H
LED status CPU-LED status Stores the CPU module's LED bit pattern. SD201
1F
H
CPU operation
status CPU operation
status
Stores the CPU module's operation status. SD203
(b) The host PLC's operation information area is updated when the contents of
the corresponding register change. However, there are times when changes
in the corresponding register are relayed by a maximum of 200ms when the
High Performance model QCPU's scan time is 200ms or less.
There are times when changes in the corresponding register are delayed
by 200ms or more if the High Performance model QCPU's scan time
exceeds 200ms.
(c) The High Performance model QCPU of another PLC can use FROM
instruction or intelligent function module device to read data from the action
data area of the host PLC.
However, because there is a delay in data updating, use the read data for
monitoring purposes.
REMARK
1: For the Motion CPU, 5
H
to 1C
H
of the host PLC's operation information area is
not used. If 5
H
to 1C
H
of the host PLC's operation information area is read from
the Motion CPU, it will be read as "0."
2: Refer to the corresponding special registers for further details.