Mitsubishi QCPU (Q Mode), Руководство пользователя

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MELSEC-Q
16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE PLC
SYSTEM
16.1 Automatic Refresh of CPU Shared Memory
(1) Automatic refresh of CPU shared memory
(a) Automatic refresh of the CPU shared memory is a function of automatic
data transfer between CPU PLCs in END processing of the CPU.
As the device memory data of other PLCs is automatically read when the
automatic refresh function is used, is possible for the host PLC to use the
device data of other PLCs.
Data is transmitted between the following parties during automatic refresh
of CPU shared memory.
• Between High Performance model QCPU and High Performance model
QCPU
• Between High Performance model QCPU and Motion CPU
• Between Motion CPU and Motion CPU
• Between High Performance model QCPU and PC CPU module
• Between Motion CPU and PC CPU module
An outline of operations when the PLC No.1 performs automatic refresh on
the 32 points between B0 and B1F, and when the PLC No.2 performs
automatic refresh on the 32 points between B20 and B3F.
Host PLC's operation
information area
System area
Automatic refresh area for
writing in the No.1 machine
PLC No.1
User's free area
CPU shared memory
Device memory
B0 to B1F (For use of the PLC No.1)
B20 to B3F (For use of the PLC No.1)
System area
User's free area
Device memory
Reading performed with
the PLC No.2
END process
Writing performed with
the PLC No.1 END process 2) Writing performed
with the PLC No.2
END process
1)
3)
4)
PLC No.2
Host PLC's operation
information area
CPU shared memory
Automatic refresh area for
writing in the No.2 machine
Reading performed with
the PLC No.1
END process
B0 to B1F (For use of the PLC No.1)
B20 to B3F (For use of the PLC No.1)
The processes performed during the PLC No.1 END process.
1): The B0 to B1F transmission device data for the PLC No.1 is
transferred across to the host PLC shared memory automatic refresh
area.
4): The data in the PLC No.2 CPU shared memory automatic refresh area
is transferred across to B20 to B3F in the host PLC.
The processes performed during the PLC No.2 END process.
2): The B20 to B3F transmission device data for the PLC No.2 is
transferred across to the host PLC shared memory automatic refresh
area.
3): The data in the PLC No.1 CPU shared memory automatic refresh area
is transferred across to B0 to B1F in the host PLC.
(b) Executing automatic refresh
Automatic refresh is executed when the CPU module is in RUN status,
STOP status or PAUSE status. Automatic refresh cannot be performed
when a stop error has been triggered in the CPU module.
If a stop error occurs on one module, the other modules for which an error
has not occurred will save the data prior to the stop error being triggered.
For example, if a stop error occurs in the PLC No.2 when B20 is ON, the
B20 in the PLC No.1 will remain at ON, as shown in the operation outline in
fig. (a).
(c) When automatic refresh is carried out, it is necessary to set the points to be
transmitted by each CPU and the device in which the data is to be stored
(the device that will perform automatic refresh) with the PLC parameter
multiple PLC settings.
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