App - 41 App - 41
MELSEC-Q
APPENDICES
Special Register List (Continued)
Number
Name
Meaning
Explanation
Set by
(When
set)
Corresponding
ACPU
D9
Corresponding
CPU
SD738
SD739
SD740
SD741
SD742
SD743
SD744
SD745
SD746
SD747
SD748
SD749
SD750
SD751
SD752
SD753
SD754
SD755
SD756
SD757
SD758
SD759
SD760
SD761
SD762
SD763
SD764
SD765
SD766
SD767
SD768
SD769
Message
storage
Message
storage
• Stores the message designated by the MSG instruction.
SD738
SD739
SD740
SD741
SD742
SD743
1st character
B15
B8
B7
B0
SD744
SD745
SD746
SD747
SD748
SD749
SD750
SD751
SD752
SD753
SD754
SD755
SD756
SD757
SD758
SD759
SD760
SD761
SD762
SD763
SD764
SD765
SD766
SD767
SD768
SD769
64th character
2nd character
3rd character
4th character
5th character
6th character
7th character
8th character
9th character
10th character
11th character
12th character
13th character
14th character
15th character
16th character
17th character
18th character
19th character
20th character
21st character
22nd character
23rd character
24th character
25th character
26th character
27th character
28th character
29th character
30th character
31st character
32nd character
33rd character
34th character
35th character
36th character
37th character
38th character
39th character
40th character
41st character
42nd character
43rd character
44th character
45th character
46th character
47th character
48th character
49th character
50th character
51st character
52nd character
53rd character
54th character
55th character
56th character
57th character
58th character
59th character
60th character
61st character
62nd character
63rd character
to
to
S (During
execution)
New
SD774
TO
SD775
PID limit
setting
0: Limit set
1: Limit not set
• Designate the limit for each PID loop as follows:
SD774
SD775
B15
B1
B0
Loop16
Loop32
Loop2
Loop18
Loop1
Loop17
to
to
U
New
QCPU
SD778
Refresh
processing
selection
when the
COM
instruction is
executed
Bits 0 to 4:
0:Do not
refresh
1:Refresh
F bit
0:Refresh
1:Do not
refresh
Selects whether or not the data is refreshed when the COM instruction
is executed.
1/0
I/O refresh
CC-Link refresh
MELSECNET/H refresh
Automatic refresh of intelligent
function modules
Automatic refresh of multi-CPU
shared memory
General data processing
SD778
0
1/0
1/0 1/0 1/0 1/0
b14
b5
to
b4 b3 b2 b1 b0
b15
U
New
QCPU
Serial number
04012 or later
Содержание QCPU (Q Mode)
Страница 111: ...5 19 5 19 MELSEC Q 5 ASSIGNMENT OF I O NUMBERS MEMO ...
Страница 450: ...App 59 App 59 MELSEC Q APPENDICES MEMO ...