App - 51 App - 51
MELSEC-Q
APPENDICES
Special Register List
(10) Special register list dedicated for QnA
ACPU
Special
Conversion
Special
Register after
Conversion
Special
Register for
Modification
Name
Meaning
Details
Corresponding
CPU
Stores the execution result of the ZNRD (word device
read) instruction
• ZNRD instruction setting
fault:
Faulty setting of the
ZNRD instruction
constant, source,
and/or destination
• Corresponding station error:
One of the stations is
not communicating.
D9200
SD1200
ZNRD
(LRDP for
ACPU)
processing
results
0: Normal end
2: ZNRD instruction
setting fault
3: Error at relevant
station
4: Relevant station
ZNRD execution
disabled
• ZNRD cannot be executed
in the corresponding station:
The specified station is
a remote I/O station.
Stores the execution result of the ZNWR (word device
write) instruction.
• ZNWR instruction setting
fault:
Faulty setting of the
ZNWR instruction
constant, source,
and/or destination.
• Corresponding station error:
One of the stations is
not communicating.
D9201
SD1201
ZNWR
(LWTP for
ACPU)
processing
results
0: Normal end
2: ZNWR
instruction setting
fault
3: Error at relevant
station
4: Relevant station
ZNWR execution
disabled
• ZNWR cannot be executed
in the corresponding station:
The specified station is
a remote I/O station.
D9202
SD1202
Stores conditions
for up to numbers 1
to 16
D9203
SD1203
Local station link
type
Stores conditions
for up to numbers
17 to 32
Stores whether the slave station corresponds to
MELSECNET or MELSECNET11.
• Bits corresponding to the MELSECNET 11 stations
become "1."
• Bits corresponding to the MELSECNET stations or
unconnected become "0."
SD1202
SD1203
SD1241
SD1242
b15 b14 b13 b12 b11 b10 b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
L16 L15 L14 L13 L12 L11
L32 L31 L30 L29 L28 L27
L48 L47 L46 L45 L44 L43
L64 L63 L62 L61 L60 L59
L26
L42
L58
L25
L41
L57
L24
L40
L56
L23
L39
L55
L22
L38
L54
L21
L37
L53
L20
L36
L52
L19
L35
L51
L18
L34
L50
L17
L33
L49
L10 L9
L8
L7
L6
L5
L4
L3
L2
L1
Bit
Device
number
• If a local station goes down during the operation, the
contents before going down are retained.
Contents of SD1224 to SD1227 and SD1228 to
SD1231 are ORed. If the corresponding bit is "0", the
corresponding bit of the special register above
becomes valid.
• If the own (master) station goes down, the contents
before going down are also retained.
QnA
D9204
SD1204
Link status
0: Forward loop,
during data link
1: Reverse loop,
during data link
2: Loopback
implemented in
forward/reverse
directions
3: Loopback
implemented
only in forward
direction
4: Loopback
implemented
only inreverse
direction
5: Data link
disabled
Stores the present path status of the data link.
• Data link in forward loop
Master
station
Station 1
Station 2
Station n
Forward loop
Reverse loop
• Data link in reverse loop
Master
station
Station 1
Station 2
Station n
Forward loop Reverse loop
QnA
Содержание QCPU (Q Mode)
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