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MELSEC-Q
16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE PLC
SYSTEM
16 COMMUNICATION BETWEEN CPU MODULES IN MULTIPLE PLC
SYSTEM
It is possible to perform the following interactive transmission between each CPU
modules with a multiple PLC system.
• Automatically refreshing the device data between each CPU modules with
multiple PLC system parameter settings.
• Data transfer between other High Performance model QCPU and PC CPU
module via CPU shared memory using multiple PLC instructions
Also, data reading of High Performance model QCPU from CPU shared
memory of Motion CPU using multiple PLC instructions
• Control command from the High Performance model QCPU to the Motion CPU
with Motion dedicated PLC instructions.
• Writing and reading of the device data from the High Performance model
QCPU to the other CPU modules with communication dedicated instructions
between multiple PLCs.
Also, event issuance from High Performance model QCPU to PC CPU module
using instructions dedicated to multiple PLC communication
(1) Automatic refresh of device data
Automatic refresh of the CPU shared memory is a function of automatic data
transfer between CPU modules in END processing of the CPU.
As the device memory data of other PLCs is automatically read when the
automatic refresh function is used, is possible for the host PLC to use the device
data of other PLCs.
Host PLC's operation
information area
System area
Automatic refresh area for
writing in the PLC No.1
PLC No.1
User's free area
CPU shared memory
Device memory
For use of the PLC No.1
For use of the PLC No.2
Reading performed
with the PLC No.2
END process
Reading performed
with the PLC No.1
END process
Writing performed with
the PLC No.1 END process
Writing performed
with the PLC No.2
END process
PLC No.2
Host PLC's operation
information area
CPU shared memory
System area
Automatic refresh area for
writing in the PLC No.2
User's free area
Device memory
For use of the PLC No.1
For use of the PLC No.2
(2) Exchanging data with multiple PLC instructions and instructions
that use Intelligent function module device (U \G )
The CPUs on the multiple PLC system write data into the host PLC's CPU
shared memory with the use of the S. TO instruction/FROM instruction.
The data written to the CPU shared memory of the host PLC with the S. TO
instruction is read by High Performance model QCPU of other PLCs with the use
of the FROM instruction and U \G .
Non-linked device data also read directly when the command is executed.
Sequence program
Read with FROM
instruction or U \G
Written with the S. TO instruction
S. TO instruction
execution
Host PLC's operation
information area
System area
PLC No.1
CPU shared memory
Host PLC's operation
information area
System area
PLC No.2
CPU shared memory
Data written with
the S. TO instruction
Sequence program
FROM command
execution
Automatic refresh area for
writing in the PLC No.1
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Содержание QCPU (Q Mode)
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